Hi,
I have searched many posts to resolve my problem, unfortunately still i'm facing problem to connect XDS100v2 onboard JTAG to AM335x(Beaglebone). Below is my Environment and the Issue description.
Environment:
Host PC: Ubuntu 10.04 LTS
CCS Version: CCS5.2.1.00018_linux
Target: Beaglebone - A6
Setup procedure:
1) Installed ti-sdk-am335x-evm-05.05.00.00-Linux-x86-Install to /home/<user>/ti-sdk-am335x-evm-05.05.00.00
2) Installed CCSv5.2 to /home/<user>/ti with sudo permission. And followed Code Composer Studio v5 Users Guide to setup CCv5.2
3) sudo modprobe ftdi_sio vendor=0x0403 product=0x6010
4) verified the xds100v2 emulator by executing the below command on ubuntu terminal.
afrath@afrath-laptop:~/ti/ccsv5/ccs_base/common/uscif$ ./xds100serial
Scanning for XDS100 emulators...
VID/PID Type Serial # Description
0403/6010 generic XDS100 TIVKYMWP BeagleBone/XDS100V2
5) Added target (beaglebone) linux source code to CCSv5 as per user guide.
6) configured target configurations on CCSv5 for beaglebone using bbone-target-config.ccxml as per ccsv5 user guide.
7) Linux source path and vmlinux (compiled kernel with debug information) path was given properly, enabled Load symbols only.
8) connected beagle bone to host through USB cable and linux booted up.
9)Now clicked Debug on CCSv5 Debug configuration window. after this the ccsv5 shows load program status.
10) The below are the observation on my CCSv5
A. "No source available for "0xc001cbbc"" on left side window
b. the below code on disassembly window
cpu_v7_proc_init:
c001cb80: E1A0F00E MOV PC, R14
cpu_v7_proc_fin:
c001cb84: EE110F10 MRC P15, #0, R0, C1, C0, #0
c001cb88: E3C00A01 BIC R0, R0, #4096
c001cb8c: E3C00006 BIC R0, R0, #6
c001cb90: EE010F10 MCR P15, #0, R0, C1, C0, #0
c001cb94: E1A0F00E MOV PC, R14
c001cb98: E320F000 MSR CPSR_, #0
c001cb9c: E320F000 MSR CPSR_, #0
cpu_v7_reset:
c001cba0: EE111F10 MRC P15, #0, R1, C1, C0, #0
c001cba4: E3C11001 BIC R1, R1, #1
c001cba8: EE011F10 MCR P15, #0, R1, C1, C0, #0
c001cbac: F57FF06F ISB
c001cbb0: E1A0F000 MOV PC, R0
cpu_v7_do_idle:
c001cbb4: F57FF04F DSB
c001cbb8: E320F003 WFI
c001cbbc: E1A0F00E MOV PC, R14
cpu_v7_dcache_clean_area:
c001cbc0: EE103F30 MRC P15, #0, R3, C0, C0, #1
c001cbc4: E1A03823 MOV R3, R3, LSR #16
c001cbc8: E203300F AND R3, R3, #15
c001cbcc: E3A02004 MOV R2, #4
c001cbd0: E1A02312 MOV R2, R2, LSL R3
c001cbd4: EE070F3A MCR P15, #0, R0, C7, C10, #1
c001cbd8: E0800002 ADD R0, R0, R2
c001cbdc: E0511002 SUBS
c.the below error on ccv5 console
IcePick_D_0: Error: (Error -150 @ 0x0) One of the FTDI driver functions used during configuration returned a invalid status or an error. (Emulation package 5.0.747.0)
CortxA8: Error: (Error -1044 @ 0xFFFFFF66) The emulator reported an error. Confirm emulator configuration and connections, reset the emulator, and retry the operation. (Emulation package 5.0.747.0
I expected linux source code on the CCS v5 window for the corresponding execution point. but it shows ""No source available for "0xc001cbbc" :(
i culdnt find any solution for the last one week. please someone who is successful in setting up CCSv5.2 + beaglebone can guide me to resolve this problem. let me know if i missed any steps and also if you need any log.
I beleive the connection is happening between target and ccv5 but the debug configuration is the problem. forget to say that i have also tested the xdsv100v2 connection before start debugging it by clicking test connection on debug window and it gave the below log
[Start]
Execute the command:
%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity
[Result]
-----[Print the board config pathname(s)]------------------------------------
/home/afrath/.TI/882953448/0/0/BrdDat/testBoard.dat
-----[Print the reset-command software log-file]-----------------------------
This utility has selected a 100- or 510-class product.
This utility will load the adapter 'libjioserdesusb.so'.
The library build date was 'May 31 2012'.
The library build time was '00:33:29'.
The library package version is '5.0.747.0'.
The library component version is '35.34.40.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
-----[Print the reset-command hardware log-file]-----------------------------
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).
-----[The log-file for the JTAG TCLK output generated from the PLL]----------
There is no hardware for programming the JTAG TCLK frequency.
-----[Measure the source and frequency of the final JTAG TCLKR input]--------
There is no hardware for measuring the JTAG TCLK frequency.
-----[Perform the standard path-length test on the JTAG IR and DR]-----------
This path-length test uses blocks of 512 32-bit words.
The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 6 bits.
The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.
-----[Perform the Integrity scan-test on the JTAG IR]------------------------
This test will use blocks of 512 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG IR Integrity scan-test has succeeded.
-----[Perform the Integrity scan-test on the JTAG DR]------------------------
This test will use blocks of 512 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG DR Integrity scan-test has succeeded.
[End]
Thanks in Advance
Afrath
