ccsv5 Trouble Reading Memory CE1 Device core is hung

I have made some progress on this issue. I created a new pair of programs which were very simple and just configured the respective dsps in EMIF and HPI modes, then checked to see if I could read data on the EMIF dsp from the HPI dsp. I used the same initialization from my original code and had some difficulty. The result wasn't quite the same with the hanging dsp, but I still had trouble reading anything. I revisited the emifCfg0 structure settings and found some to be strange compared to the documentation. The structure was created when I used the import from legacy CCSv3 feature. After modifying the structure to be more or less the default with a 5 cycle timeout instead of 1, it worked fine. Now to try modifying the original structure and see if it helps there.

I reproduced the updated emifCfg settings in the old code and that seemed to stop the hanging.

I also discovered that the EMIF dsp can't read the HPI chip unless the HPI chip is running, even when the EMIF chip is suspended and you examine memory from the EMIF chip with CCS. (probably obvious but worth mentioning).

More strangeness unfortunately.

I created the following snippet on the EMIF dsp

Void main()
{
    int i;
    int *dsp1mem;
    int myval;

    CSL_init();

    CHIP_RSET(XBSR, 1);

    EMIF_config(&emifCfg00);        // configure emif - reset is here too
    EMIF_RSET(EMIRST,0xFFFFu); // reset emif state

    dsp1mem= (int *) 0x2002c0;
    myval=*dsp1mem;

    while(1);

And the following on the HPI dsp

Void main()
{
    int *pointer;

    // Start CSL
    
    CSL_init();
    
    CHIP_RSET(XBSR, 18);

    pointer= (int *) 0x0002c0;
    *pointer= (int) 0x1111;

    while(1);

In my test environment, I can run these and stop the emif dsp to view the location 0x2002c0 without a problem. When I insert this at the top of my real code, I now get the proper data in myval but when I try to look at location 0x2002c0 with the memory browser, I get a read error. hmmm, any ideas?

Here is my emif config

EMIF_Config emifCfg00 = {
    0x0020,        /*  Global Control Register   */
    0xffff,        /*  Global Reset Register   */
    0x1fff,        /*  CE0 Space Control Register 1   */
    0x5fff,        /*  CE0 Space Control Register 2   */
    0x0001,        /*  CE0 Space Control Register 3   */
    0x1fff,        /*  CE1 Space Control Register 1   */
    0x5fff,        /*  CE1 Space Control Register 2   */
    0x0005,        /*  CE1 Space Control Register 3   */
    0x1fff,        /*  CE2 Space Control Register 1   */
    0x5fff,        /*  CE2 Space Control Register 2   */
    0x0005,        /*  CE2 Space Control Register 3   */
    0x1fff,        /*  CE3 Space Control Register 1   */
    0x5fff,        /*  CE3 Space Control Register 2   */
    0x0001,        /*  CE3 Space Control Register 3   */
    0xf948,        /*  SDRAM Control Register 1   */
    0x0080,        /*  SDRAM Period Register   */
    0x0000,        /*  SDRAM Initialization Register   */
    0x03ff         /*  SDRAM Control Register 2   */
};