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image_processing_openmp_evmc6678l: changing .far to DDR3 cause error

Other Parts Discussed in Thread: SYSBIOS

Hi guys,

I'm working on a project that is based on the image_processing_openmp_evmc6678l. Except in my project, I added a tftp command to receive a file from a tftp server. When I test to transfer a small file (to be placed into an array of 10 x 10 of integer), it works fine. The location of the array is in MSMCSRAM_NOCACHE (0xA0251778).

In my project, I need to transfer large amount of data and I don't want to use the web interface as in the demo and that is why I'm using the tftp. When I added

Program.sectMap[".far"] = "DDR3";

The program compiled without any error and when run to main, I can see the location of the array is in DDR3 (0x88111518), however I received the following error

[C66xx_0] ti.sdo.ipc.heaps.HeapMemMP: line 641: assertion failure: A_internal: An internal error has occurred

xdc.runtime.Error.raise: terminating execution

at the following line in mcip_master_main.c

task = Task_create((ti_sysbios_knl_Task_FuncPtr)master_main, &task_params, &eb);

I also have tried to use the #pragma DATA_SECTION to put the array into DDR3, and it give the same error. Can anyone help me with this?

Thank you very much.

Rizuan

  • Hi,

    Changing platform memory section solve the problem. I resize my DDR3 and DDR3_NOCACHE size so that DDR3 will be larger and DDR3_NOCACHE becomes smaller. I noticed that after I did this, the image segmentation from the webpage no longer can process by using more than 1 core. It returned Error in running edge detection.

    Can anyone explain to me what is the DDR3_NOCACHE is for? How can it affect the openmp code?

    Rizuan

  • Hi,

    After changing the DDR3 and DDR3_NOCACHE, we must change this line in the .cfg file:

    Cache.setMarMeta(0x90000000, 0x10000000, 0);

    Then I no longer have the problem that mentioned in the previous post.

    But, the question remained, what is the purpose of DDR3_NOCACHE?

    Rizuan

  • Rizuan,

    Which version of the OpenMP runtime are you using? I believe DDR_NOCACHE is from an older version of the sample config file - it was required when the OpenMP runtime did not manage memory/cache consistency and all application data had to be placed in non-cached memory by default. The programmer was responsible for managing memory consistency.

    The current version of the OpenMP runtime (1.01.02.06) includes support for memory consistency - the programmer does not have to manage consistency by adding in calls to cache write-back/invalidate functions etc.. You can get it at: http://software-dl.ti.com/sdoemb/sdoemb_public_sw/bios_mcsdk/02_01_00_03/index_FDS.html.

    With this version of the runtime, stacks can be placed in a DDR memory region marked as cache-able and write-through. The configuration file in the OpenMP examples directory (omp_config.cfg) can be used as a template. There is also a corresponding platform file in examples/platforms/evm6678_ddr/Platform.xdc.

    Ajay

  • Hi Ajay,

    Thanks for your reply. I am using the omp_1_01_02_06 from MCSDK_2_01_00_03, the recently released components. Are you saying that I can remove the DDR3_NONCACHE memory region from demos.image_processing.openmp.evmc6678l.platform in the image_processing_openmp_evmc6678l demo project ? From the demo project's .cfg file, it has the following lines that related to the DDR3_NOCACHE:

    Program.sectMap["ddr"] = new Program.SectionSpec();

    Program.sectMap["ddr"].loadSegment = "DDR3_NOCACHE";

    Cache.setMarMeta(0x90000000, 0x10000000, 0);

    I've found 3 omp_config.cfg in my omp directory. All of them have:

    Program.sectMap["ddr"] = new Program.SectionSpec();

    Program.sectMap["ddr"].loadSegment = "DDR3";

    Cache.setMarMeta(0x80000000, 0x20000000, Cache.PC | Cache.WTE);

     

    I believe you are suggesting to change

    Program.sectMap["ddr"].loadSegment = "DDR3_NOCACHE";

    to

    Program.sectMap["ddr"].loadSegment = "DDR3";

    change

    Cache.setMarMeta(0x90000000, 0x10000000, 0);

    to

    Cache.setMarMeta(0x80000000, 0x20000000, Cache.PC | Cache.WTE);

    and remove the DDR3_NOCACHE from the platform. Is this correct? I'm looking for sparing my DDR3 region for my application to run.

    If TI has introduced the improvement, I hope they can change the sample/demo project as well because most of the user (I believe) like me work based on the sample/demo project.

    Anyway, congratulation to TI for the good improvement in support.

    Rizuan

  • Hi,

    I still have the earliest problem, i.e. mapping .far section to DDR3 cause the:

    ti.sdo.ipc.heaps.HeapMemMP: line 641: assertion failure: A_internal: An internal error has occurred

    xdc.runtime.Error.raise: terminating execution

    I tried this on the

    demos.image_processing.openmp.evmc6678l.platform

    and the

    ti.omp.examples.platforms.evm6678 platform

    Rizuan