I am having a preprocessor problem with the ARM compiler. Probably something that I didn't specify right, but cannot find out what.
file A.h has a #define X 1 file B.c has an #if X ... #endif which ccsv5 shows in gray, ie not processed even though X has a non-zero value
B.pp shows A.h included before the #if...#endif sequence.
I am baffled by this behavior and have no idea what to try next.
btw: if i set A.h to #define X then I get a syntax error when the compiler processes the #if X ...#endif sequence in B.c; which is expected!
Any insight would be most appreciated. Thanks, Jon