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CCS 5.x OMAP5432 Support

Other Parts Discussed in Thread: SYSBIOS, CCSTUDIO

Hey guys; does anyone know our planned release support for OMAP5432 support?  I saw that the OMAP5432 is JTAGable in CCS 5.4; but there are still no configs, or even the notion of selecting an A15 as the project type in CCS.  I've been telling my customers to just use a Generic A8 device type; and I guess a 5430 as the target in the ccxml file for JTAG?  Wondering when we get an actual OMAP5432 uEVM as the target and A15 project support; alsong with all the built in register definitions into CCS (I think you still need CSP patch to support OMAP5, yes?)  (I'm actually downloading this now to try...)

  • There is a chip support package for OMAP5 available directly from the product group that adds in the device support files including peripheral register definitions.  You need to get the package from the product group as it is still NDA only.

    As far as A15 in the project wizard, we will likely add that in for CCSv5.5 (it will default to Linaro gcc baremetal).  It is not there today as the TI compiler doesn't do anything special for A15 (i.e. it supports generating code targeted for A8 which will run on A15 but hasn't added support beyond A8).  Most customers run an OS like Linux or Android on the A15 thus the TI compiler is not relevant.  Do you have customers who are running baremetal or BIOS?

    John

  • Will this chip support package enable me to develop code for the OMAP5's CortexM4 and DSP? Is this using GEL to allocate resources for these processors and allow me to download code, boot the code and debug that code? My goal is to use RPMSG (Syslink3) for RPC between Linux running on the CortexA15 processors and Sysbios application running on the CortexM4 and DSP. My understanding is the RemoteProc needs the M4 or DSP code to be in ELF format. Is there any examples available to see the development process?

    Regards,

    John

  • I managed to get the device support for the OMAP5 from here:

    http://processors.wiki.ti.com/index.php/Device_support_files

    I'm currently using V1.0.7

    Now I'm using TI Resource Explorer in CCSV5.4.0.00091 to create a SYS/BIOS Hello World example to run on the CortexM4. I import the example project into CCS, set the Connection to BlackHawk USB560M Emulator and then click Next. The Target is already set to ti.targets.arm.elf.M4. For the Platform, I select ti.platforms.stellaris:OMAP5432. I'm using XDCtools V3.25.2.70 and SYS/BIOS V 6.35.3.47. After that, I click Finish and the project imports without error. However, when I click on "Build the imported project", I get an error "The OMAP5432 device is not currently supported"

  • I managed to build the same example for the Tesa (C6000 DSP), but when I launch the debugger, I get an error message:


    "Error connecting to the target:
    (Error -1180 @ 0x0)
    Device is held in reset. Take the device out of reset, and
    retry the operation.
    (Emulation package 5.1.73.0)


    My guess is that the CortexA15 processors have to release the CortexM4 from reset, but I'm not sure how to do this. I'm running Linux V3.8 on the CortexA15 processors. 

    Is there no way to do this with a GEL file?

  • John,

    I don't have an OMAP5 board at the moment (mine is on loan).  However if I start a debug session without connecting I see there is a reset script available that may help.  With the A15_0 selected in the debug view go to the Scripts menu.  Under RESET there is a menu item to reset the minC64 and for each of the M4s.  In general I believe that this usually gets done by running a routine on the A15 but I am not familiar with how to do that.  Someone on the OMAP forum may know how to do that.  

    Regards,

    John

  • Hi John,

    Thank you so much for your help. The first problem starts when you try to debug the app. The error dialog which shows the device is in reset, is modal, so you cannot run any scripts to take the device out of reset. All you can do is click cancel, which exits the debugger.

    I disabled all the debug "Auto Run Options".  Now when I launch the debugger, the C646X is connected and suspended. I then connect the CortexA15_0 and run the RESET scripts for reset_miniC64, reset_ipu_cortexM4_RTOS_board and reset_ipu_cortexM4_SIMCOP_board. I can run the app. 

    Now the app I'm running is a simple Hello World example running on SYS/BIOS (Created with TI Resource Explorer - SYS/BIOS, ARM, OMAP5432_UEVM, Generic Example, Hello Example). When I run the app, I do not get any output. When I halt the app, it is aways in the Timer_checkFreq function (Timer.c) at a line that has the following comments above it:

    /* Wait for 'TIMERCOUNTS' timer counts to elapse */

    Thank you again for your help

    Regards,

    John

  • Hi John,

    I did manage to get the code to build for the OMAP5 CortexM4.  

    Here is what I do to create the OMAP5432 EVM CortexM4 Hello World app.
    1. From TI Resource Explorer I click on Examples
    2. Select SYS/BIOS – ARM – OMAP5 – OMAP5430 – General Examples – Hello World
    3. Click on "Import the example project into CCS"
    4. On the first dialog, I select "Blackhawk USB560-M Emulator"
    5. Click Next
    6. The Target is already populated with "ti.targets.arm.elf.M4"
    7. For Platform I select "ti.platforms.sdp5430" (Don't click on "ti.platform.Stellaris"OMAP5432" as this does not exist in XDCTools)
    8. Click Finish
    9. I get two green check marks, one for Step 1 and one for Step 3
    10. When I click on "Build the imported project" and everything builds successfully.
    11. When I click on click on "Debug  the imported project", the debugger will launch and throw and error "Device is held in rest". All you can do is cancel which exits the debugger.
    12. Edit the Debug Configuration in the "Target" tab, select the "Cortex_M4_0" Device
    13. Select Auto Run and Launch Options. Unselect all "Auto Run Options" and all "Launch Options"
    14. Click Apply and Launch Debugger
    15. Show Debug "Control Panel" and select GEL Files
    16. Connect Target CortexA15_0 and in the GEL panel, Load GEL file "omap5430_cortexA15_reset.gel"
    17. Under Scripts menu select RESET - reset_miniC64, reset_ipu_cortexM4_RTOS_board, reset_ipu_cortexM4_SIMCOP_board
    18. Connect Target CortexM4_0
    From here my guess is that I need to run some GEL files since the memory map for both processors does not exist. I have tried loading "omap5430_cortexa15_cpu0_startup.gel" which seems to set the memory map for the CortexM4, but I get several errors:

    IcePick_D: GEL Output: Ipu RTOS is released from Wait-In-Reset.
    IcePick_D: GEL Output: Ipu SIMCOP is released from Wait-In-Reset.
    IcePick_D: GEL Output: IVAHD C64 is released from Wait-In-Reset.
    IcePick_D: GEL Output: IVAHD ICONT1 is released from Wait-In-Reset.
    IcePick_D: GEL Output: IVAHD ICONT2 is released from Wait-In-Reset.
    CS_DAP_DebugSS: GEL Output: --->>> CONFIGURE DEBUG DPLL settings to 1.6 GHZs <<<---
    CS_DAP_DebugSS: GEL Output: > Setup DebugSS Clocking 1.6GHz M4_3
    CS_DAP_DebugSS: GEL Output: > Setting STM output clock to 50MHz
    CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS Clocking 1.6GHz
    CS_DAP_DebugSS: GEL Output: --->>> TURNING ON L3_INSTR and L3_3 clocks required for debug instrumention <<<<<<----
    CS_DAP_DebugSS: GEL Output: ---<<< L3 instrumentation clocks are enabled >>>> ---
    CS_DAP_DebugSS: GEL Output: --->>> GP device, no FW settings needed. <<<---
    CS_DAP_DebugSS: GEL Output: ---<<< Firewalls settings >>>---
    CS_DAP_PC: GEL Output: --->>> GP device <<<---
    CS_DAP_PC: GEL Output: Cortex-A15 1 is not in WIR mode so nothing to do.
    CortexA15_0: Breakpoint Manager: Retrying with a AET breakpoint
    CortexA15_0: Trouble Setting Breakpoint with the Action "Process CIO" at 0x80003862: (Error -1066 @ 0x3340) Unable to set requested breakpoint in memory. Verify that the breakpoint address is in writable memory. (Emulation package 5.1.73.0)
    CortexA15_0: Breakpoint Manager: Retrying with a AET breakpoint
    CortexA15_0: Trouble Setting Breakpoint with the Action "Terminate Program Execution" at 0x80003fa4: (Error -1066 @ 0x3340) Unable to set requested breakpoint in memory. Verify that the breakpoint address is in writable memory. (Emulation package 5.1.73.0)
    CortexA15_0: Breakpoint Manager: Retrying with a AET breakpoint
    CortexA15_0: Trouble Setting Breakpoint with the Action "Finish Auto Run" at 0x8000481c: (Error -1066 @ 0x3340) Unable to set requested breakpoint in memory. Verify that the breakpoint address is in writable memory. (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Writing Memory Block at 0x8000806c on Page 0 of Length 0x1cf1: (Error -2130 @ 0x80009D5C) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: GEL: File: /home/jsynesio/workspace_v5_4/hello_OMAP5430_CortexM/Debug/hello_OMAP5430_CortexM.out: Load failed.
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -1003 @ 0x2BC5) Internal error: Invalid parameter passed to function. Restart the application. If error persists, please report the error. (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    CortexA15_0: Trouble Reading Register CPSR: (Error -1066 @ 0x3340) Unable to set requested breakpoint in memory. Verify that the breakpoint address is in writable memory. (Emulation package 5.1.73.0)
    CortexA15_0: GEL Output: --->>> omap5430_memory_map_init DONE !!! <<<---
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)
    Cortex_M4_0: Trouble Reading Memory Block at 0xfffffffa on Page 0 of Length 0x6: (Error -2130 @ 0xFFFFFFF8) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.73.0)


    When I try to load the CortexM4 Hello World Example, I get a memory access violations, so my guess is the Memory Map isn't correct. Can someone show me the correct way to setup the debugger and the correct sequence of running the GEL files.

    Regards,

    John 

  • John,

    I am pretty out of my depth on this one.  I have my 5432 EVM back so I can give it a try tomorrow but I am not sure I will get any further than you.  Have you tried the OMAP5 EVM forum?  http://e2e.ti.com/support/omap/f/885.aspx  To be honest most of the threads there look to be Linux or peripheral related.  I am seeing if I can get someone with some experience on this platform to help out.

    Regards,

    John

  • Hi John,

    Thank you for everything you are doing to help. As a best guess, surely the audio and video Codec developers in TI are doing this type of development all the time? I just wondering who in TI are developing the firmware for the CortexM4 and DSP that we load with RemoteProc? That would be my best guess. 

    WRT the OMAP5 forum; if you ask any tough question, you get the standard response "This question is outside the scope of this forum which is intended for OMAP5432 EVM bring-up questions"

    Regards,

    John

  • John,

    Here is the sequence that works for me.  

    I start by creating a target configuration file

    • Open the target configuration view from the view menu
    • CLick the button to create a new target configuration
    • My emulator right now is an XDS200 USB
    • I select OMAP5432_UEVM as the board/device
    • This sets up the GEL files for me automatically
    Next I import a SYS/BIOS example from resource explorer.  Here I used pretty much the same steps as you.  
    • Under OMAP5432_UEVM I selected the swi example (make sure it says it is CortexM and not ARM9, if it says ARM9 then go back to resource explorer and select the other OMAP5432_UEVM node in the tree)
    • Like you I select sdp5430 as the platform as the others were giving me issues
    • I build the example (took a while as I didn't have the RTS library built)
    Now it is time to launch the debugger
    • In the target configuration view I right click on the target config I created earlier and select launch
    • I then connect A15_0
    • I run the script to reset the M4 RTOS
    • I then connect to M4_0
    • I click on the load program button and browse my projects and select the .out from the swi project
    • I can then run the program and the output shows me it ran correctly.
    Following that procedure I didn't have any error messages except when I forgot to press the power button on the uEVM.
    I don't think the examples for this platform are setup to capture log info so hello wouldn't show any info (except maybe in the ROV tool)
    Regards,
    John
  • John, you are the greatest. I followed your steps and I managed to run the SWI example and everything worked perfectly. Now I can find out why the Hello World example doesn't print to stdout. 

    I am over the moon and I cannot thank you enough. 

    Regards,

    John

  • No problem John.  Sorry it wasn't faster.  We just have 1 of these boards.

    As far as hello world if you are using the SYS/BIOS based one it is not using standard C I/O but instead a logging mechanism built into BIOS.  It does this so that they can be done in real-time without halting the CPU as traditional C I/O uses a breakpoint and halts the processor to transfer the info and then runs it again.  It should be possible to get the BIOS one working, but we may have to tweak something in the configuration.

    Regards,

    John

  • I quickly tried the SYS/BIOS hello example and I did get output.

    [Cortex_M4_0] hello world

    One thing I noticed is when importing the project was the first time I tried I saw that it was importing an ARM9 version of the project.  I went back and select the second OMAP5432_UEVM node in Resource Explorer and imported the example there and it was for the CortexM.

    Regards,

    John

  • Hi John,

    Yep, following your steps, I can now run the Hello World example and I get the correct output. 

    BTW, I want to confirm that you have to uncheck all "Auto Run Options" and "Launch Options" for the CortexM4. If I don't do this, I get an error when I launch the debugger which says CortexM4 held in Reset and all I can do is click Cancel which aborts the debug session. Also, I have to halt the CortexA15 so that I can run the CortexM4 Reset GEL file. Other than that, your instructions work perfectly. 

    One more thing, is it possible to have the CortexM4 Reset GEL file run automatically when the CortexA15 connects. That way, the CortexM4 can Auto Connect and Run to Main each time the debugger launches. 

    Thank you again

    Regards,

    John.

  • John,

    I am out of the office until Wednesday but to a couple of quick answers.

    I didn't have to uncheck any of the autorun options.  As long as I connected to the A15 first, ran the reset function and then connected to the M4 before loading on the M4 I was fine.

    You could have the A15 GEL file automatically reset the M4 but getting the M4 one to run the reset function would be problematic.  You could create a little DSS script to do it as that could run actions on any core (including running functions defined in the GEL files).

    Regards,

    John

  • Hi John,

    I'm somewhat confused by your answer. Doesn't CCS connect to the processor if the autorun option is selected? My understanding is that CCS loads the program, connects to the processor and then runs to main. What am I missing here?

    WRT the A15 GEL file, should I just add a call to the M4 Reset GEL file at the end of the A15 startup GEL file? My only concern is, does the A15 startup GEL file run to completion before the M4 connects. Is this the purpose of the "Slave Processor" checkbox in the Target Configuration?

    Thank you again for all your help.

    Regards,

    John

  • John,

    If you launch a debug session for a project it will:

    • Build the project
    • Launch the debugger
    • Connect to the target
    • Load the program
    • Perform the autorun action (typically run to main)
    However in my case I am launching a debug session for my .ccxml file.  When I do this it just launches the debugger.  Now when I load a program it still does the auto run to main but I manually do the connect and run the reset script first.
    Regards,
    John
  • Hi John,

     Thanks for the step by step instructions on running the program in M4. It helped me a lot in setting up ccs. However, in the last step, (After I reset the M4 and load the hello.out file) I am getting the following breakpoint error every single time. (I tried in 2 different machine)

    Cortex_M4_0: Breakpoint Manager: Retrying with a AET breakpoint
    Cortex_M4_0: Breakpoint Manager: Error enabling this function: Address exceeds the allowed range
    Cortex_M4_0: Trouble Setting Breakpoint with the Action "Process CIO" at 0x80003926: (Error -1066 @ 0x80003926) Unable to set/clear requested breakpoint. Verify that the breakpoint address is in valid memory. (Emulation package 5.1.232.0)

    I cant find a solution anywhere. Any input is greatly appreciated?

    Thanks in advance

     Manu

    p.s. I am using an XDS100v2 jtag emulator

  • Hi Manu,

    I haven't worked on this for a while, but here are some things you might try. From the error, it looks like you are trying to load your program into invalid memory and this is why you cannot set the breakpoint. Use the GEL files on the A15 processor to bring the M4 out of reset. I also disabled the run to main as this occurred before the A15 GEL file executed. 

    Regards,

    John

  • Thank you John for your reply,

     I had tried both your suggestions and still no luck. Will keep trying.

    Thanks again,

     Manu

  • Hi John,

     I figured out what went wrong. I had the SD card with Linux in the slot - A15s were running Linux. The moment I removed the SD cards and connected with JTAG and ran, the program simply worked without any errors. I guess when the Linux is running, since the M4s are used as IPUs, there might be some conflict with the breakpoint address.

    Anyways, thanks for the support.

    Regards

     Manu

  • Hi John,
    I am working on DRA7xx board which is having x5777 processor on it. I have a xds100v2 debugger. I am new to this area.
    Will you please help me on following questions.
    1. Does xds100v2 support programming x5777.?
    2. Which version of CCStudio I need to download? and I am working on Ubuntu PC. Do the debugger is detected by IDE directly or need to install any drivers on linux host?
    3. Can you please help me how to program uboot, kernal image, dtb file and filesystem etc., on x5777 using xds100v2 and IDE?

    Thank you in anticipation.
    Regards,
    Vijaykumar P
  • Vijaykumar,

    XDS100v2 should work fine with DRA7xx. However please note that it will be very slow. For that class of processor an XDS200 or XDS560 would offer much better performance.

    You can download and install the Linux image for CCSv6.1.0. If you are running the install as user at the end it will inform you that you need to run a driver install script as sudo. There is a wiki page with better installation instructions. Typically there are a number of packages that have to be installed prior to installing CCS.
    processors.wiki.ti.com/.../Linux_Host_Support_CCSv6

    As for how to program uboot, kernel image... I am not familiar with how to do that. Once you get CCS installed I would suggest creating a new thread on that topic and either someone in this forum or a DRA7xx expert will be able to help.

    Regards,
    John
  • Hi John,
    Thanks a lot. Yes, I installed CCStudio6.1.0. But while installing it has given me several controller options to select. Am I required to select all or need to select any specific type? I have selected few of them. But after installation, on creating a project I could not able find x5777 controller in the target list. I am able to see only omap5 and corresponding some controllers.

    Rgds,
    Vijay
  • Vijay,

    Do you have a TI FAE that you are working with? There is a device support package for DRA7xx that is required to see it in the list of devices in CCS. If you have this device I am assuming you have a TI FAE contact. If so they can help you get that package as it has to be released from the DRA team.

    Regards,
    John
  • John,
    Yes, We have a TI FAE. But he responds very rarely. I ll try to contact him and come back to you.

    Rgds,
    Vijay
  • Hi Jhon,

    Can you help us to figure out our problem, we r suing 5432 board with xds100v2 JTAG (we also have 560 JTAG)  but its seems we are not able to use it,

    100v2 able to  connect but when we are trying to run we are getting this error

    ARM9_ICON1: error connecting to target (error-2062 2 0x34BC) unable to halt  device, reset device and retry operation .......................................

    for 560 we are not able to pass CCS connection test,

    is it due to board boot settings? we are using default on (0101)

    we are really struggling  with this

  • Hi Rahul,

    I haven't worked on this for some time, but looking back through this discussion, I believe the problem is there are two OMAP5432 board files. I believe I selected the second one and that worked for me. Read through the discussion because I believe there is enough info to get you up and running. 

    Regards,

    John