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who can give a program file of XDS100v3 Rev2.0 with A3PN060-ZVQG100

Zhihua Wang11662
Prodigy 30 points

I make the XDS100v3 Rev2.0 emulator with A3PN060-ZVQG100 according to the documents in the TI wiki. But I find that it doesn't has the program file dtsa_a3p060.stp. I try to compile the project v3_fpga_2.prj, but a problem has happened. The project indicate that it need a vhdl file whose entity name is E48C. I can't find it. Who can give me a program file with A3PN060-ZVQG100 and the correct project. Thanks. 

And  I find the same topic in the forum, but it didn't solve the problem. http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/227430.aspx

  • 0
    TI__Guru**** 171869 points

    Hi,

    Did you notice that the other thread you linked has a working synthesized <dtsa_a3p060.stp> file for the XDS100v3 rev 2.0 emulator? Check my latest reply to that thread, which contains a .zip file (the first .zip file I sent on that thread does not work, as it was done for XDS100v2).

    If you already have tried that file and it failed, you would need to provide further details about the issue you are having. Keep in mind that we don't support any modifications to the design we provide.

    Hope this helps,

    Rafael

  • 0 in reply to desouza
    Prodigy 30 points

    Hi

    thanks for you reply. I try the second  <dtsa_a3p060.stp> file which you mentioned. I can program it into FPGA. But when I do the manufaturing test , it indicates that it can't  initial the emulator. the print information is below

    E:\MIMO_IMAGE\SIGNAL_PROCESS\XDS100v3 Rev. 2 Design Kit\Utilities>xds100v3_progf
    pga.exe -aPROGRAM dtsa_a3p060.stp
    Jam STAPL Player Version 2.2
    Copyright (C) 1997-2000 Altera Corporation
    Adapted to XDS100v3 for fpga programming by Spectrum Digital Inc.
    Erase ...
    Completed erase
    Programming FPGA Array
    Verifying FPGA Array
    Verifying FPGA Array -- pass
    Exit code = 0... Success
    Elapsed time = 00:01:21

    E:\MIMO_IMAGE\SIGNAL_PROCESS\XDS100v3 Rev. 2 Design Kit\Utilities>dbgTrace /100V
    3
    <================================================>
    dbgTrace Version 0.72 (09/07/11)
    Traceprobelib.dll Version 0.2.2.1
    Pod Type = 7
    Attempting to open XDS100v3 Emulator!
    XDS100 V3 emulator detected
    Enter Cmd: do scripts\mfg_test
    ------------------------------------
    --- XDS100v3 Manufacturing Test
    ------------------------------------
    1. Initialize the xds100v3 as an emulator
    --- Initialize XDS100v3 ---
    timeout ctr = 1
    timeout ctr = 2
    timeout ctr = 3
    timeout ctr = 4
    timeout ctr = 5
    timeout ctr = 6
    timeout ctr = 7
    timeout ctr = 8
    timeout ctr = 9
    timeout ctr = 10
    Error, timeout waiting for FTDI response
    Error reading from GPIO pin
    SubScript aborted due to an error
    Script aborted due to an error
    Enter Cmd:


  • 0 in reply to Zhihua Wang11662
    Prodigy 30 points

    Hi，

    I try to compile the v2_fpga_125.prj for A3P060, but I get the problem which is showed below

    the E48C can not found. and I try to synthesize the project. And I get the error information which is below

    %
    project -load E360_syn.prj

    Starting: C:\Actel\Libero_v9.1\Synopsys\synplify_E201009A-1\bin\mbin\synplify.exe
    Install: C:\Actel\Libero_v9.1\Synopsys\synplify_E201009A-1
    Date: Thu Jun 20 20:39:11 2013
    Version: E-2010.09A-1

    Arguments: -product synplify_pro E360_syn.prj
    ProductType: synplify_pro

    License checkout: synplifypro_actel
    License: synplifypro_actel node-locked
    Licensed Vendor: actel
    License Feature: actel_oem

    set_option -symbolic_fsm_compiler 0
    project -run synthesis
    Running synthesis on E360_syn:synthesis
    log file: "E:\study\FPGA\synthesis\E360.srr"


    Running HDL Compiler...

    Compiler Completed
    Return Code: 0
    Run Time:00:00:00

    Running ProASIC3 Mapper...
    unable to append unit szr log file to main szr log: E:\study\FPGA\synthesis\E360.szr <= E:\study\FPGA\synthesis\synlog\E360_ProASIC3_Mapper.szr
    ProASIC3 Mapper exited with errors

    Job: "ProASIC3 Mapper" terminated with error status: 2.
    See log file: "E:\study\FPGA\synthesis\E360.srr"
    Return Code: 2
    Run Time:00:00:00