H/W Breakpoint at Program Load with CCS v5.4

Isn't it H/W breakpoint for volatile memory, such as Flash ROM?

Correct.  Hardware breakpoints are typically only set by default if the memory is read-only.  Go to the Tools menu and select Memory Map.  For the address the breakpoint is being set at what type of memory does the debugger think is there?  i.e. what does it say in the Attributes column.

John

I could not find the Attributes column.

The Attributes column is showing the memory as RAM so the debugger should be setting software breakpoints.

Are you running while trying to set the breakpoint?  It will set hardware breakpoints if it is not able to set a software one.  Usually with C55x it can still set a software breakpoint while running.

If you go to the breakpoints view will is it showing all the breakpoints as "Hardware Breakpoint (C55x Core)?

One other thought is there is an option that may have gotten turned off.  If that option is not checked then CCS will only set hardware breakpoints

I see both H/W BP and S/W BP.

It was already clicked.

Yh1 said:

I see both H/W BP and S/W BP.

So the list of BPs in the view shows that both types have been set?  In the capture below it shows that I have 1 S/W BP and 1 H/W BP set.

If you set a breakpoint from the breakpoint view will it let you set a S/W BP?  i.e. click the down arrow beside the blue circle on the toolbar and select the first item in the list (Breakpoint).  Enter 0x1000 as the address.  Does it succeed?

Yes. I can set up a S/W BP at address 0x1000.

Ok.  So the debugger is able to set S/W BPs.  

A couple things to try.

1. Right click on a source line and select "Breakpoint (Code Composer Studio)- >  Breakpoint".   Did that set a S/W or H/W breakpoint?
2. For one of your H/W breakpoints go to the breakpoints view.  Right click on it and select Breakpoint Properties.  Expand the location and get the address.  Try to set a S/W breakpoint on that address the same way you set one on 0x1000.

Breakpoints are not properly working in general with CCS 5.4.

I am doing all my testing on CCSv5.4 with a C5535 eZdsp with an onboard xds100v2 and I am not having any issues.  The c55x debug stack hasn't changed in a long time.

What emulator and device are you using?

I am using Spectrum Digital XDS510 USB emulator.

Hi,

Unfortunately I don't have a C55x board that I can attach a Spectrum Digital emulator to test, but I have a few comments regarding this discussion:

- Just to clarify, HW breakpoints can be set in any memory in your system (RAM, ROM, etc.), therefore there is no functional impact other than the more limited number of HW breakpoints (SW breakpoints are virtually unlimited). As John said, CCS tries to get the most suitable memory type before deciding if it is a hardware or software breakpoint.

- The memory map screenshot you sent does not differentiate between RAM or ROM or Reserved memory regions, therefore I imagine you are not using a GEL file in your system (usually GEL files set the memory maps according to the device specifications). If so, could you try to use one and see if this helps gain some stability in breakpoint behavior?

- Also, you mentioned that you see both HW and SW breakpoints in the breakpoint manager, thus indicating you are able to set at least some SW breakpoints. Therefore, can you double-check the addresses that disallow SW breakpoints and see if they are not in ROM (bootloader, etc)?

Apart from these situations, I am not 100% sure what else may be wrong. As a last and more general resource is to check the sections General IDE and Debugger of the CCS troubleshooting page (the suggestions there usually help increase stability or unknown behavior).

Hope this helps,

Rafael

5086.test.gel

I enclose my comments as follows:

- Just to clarify, HW breakpoints can be set in any memory in your system (RAM, ROM, etc.), therefore there is no functional impact other than the more limited number of HW breakpoints (SW breakpoints are virtually unlimited). As John said, CCS tries to get the most suitable memory type before deciding if it is a hardware or software breakpoint.

I understand now.

- The memory map screenshot you sent does not differentiate between RAM or ROM or Reserved memory regions, therefore I imagine you are not using a GEL file in your system (usually GEL files set the memory maps according to the device specifications). If so, could you try to use one and see if this helps gain some stability in breakpoint behavior?

Attached is a gel file I have been using.

- Also, you mentioned that you see both HW and SW breakpoints in the breakpoint manager, thus indicating you are able to set at least some SW breakpoints. Therefore, can you double-check the addresses that disallow SW breakpoints and see if they are not in ROM (bootloader, etc)?

When I double click at RAM addresses, the BP  is still a H/W breakpoint.  It is ok as long as execution stops there.  But, it does stop some time and doesn't stop some time.

Apart from these situations, I am not 100% sure what else may be wrong. As a last and more general resource is to check the sections General IDE and Debugger of the CCS troubleshooting page (the suggestions there usually help increase stability or unknown behavior).

I also did all the suggestions from CCS troubleshooting page.

I think my problem comes from mismatch of Graphic Interface of CCS 5.4.  My project contains several hundreds of C and Assembly files.  Can I get an onsite tech support?

I do not have any of these problems with CCS v5.3.