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far pointer not working: static_base warning



I am using CCS 5.2, building a project for a 6670. My code computes a checksum over several memory sections, then compares the run-time computed checksum against a compile-time computed checksum, written to another memory section. I use a far pointer to address the section containing the pre-computed checksum. This results in a bunch of warnings, complaining about certain key sections not being in range of STATIC_BASE. The pre-computed checksum section gets placed almost at the start of L2SRAM, while these other sections are placed much further down in L2SRAM, so they are not within a 15 bit page of each other. So this warning makes sense for a near pointer, but I am indeed using a far pointer.

When I change my project settings to specifically use far addressing via mem_model:data = far, the STATIC_BASE warnings disappear. I noticed that memory section placement changes significantly when I use mem_model:data = far, versus the default setting.

I could, of course, group .bss, .rodata, and .neardata with .checksum, and this also fixes the warnings. But I don't think I should have to do that. Using the far keyword alone should work. Especially since forcing all memory accesses to be far fixes the issue.

warning #10247-D: creating output section ".bss" without a SECTIONS specification
warning #10247-D: creating output section ".checksum" without a SECTIONS specification
warning #10247-D: creating output section ".neardata" without a SECTIONS specification
warning #10247-D: creating output section ".rodata" without a SECTIONS specification
warning #10281-D: Section ".rodata" requires a STATIC_BASE relative relocation, but is located at 0x0083f650, which is probably out of range of the STATIC_BASE. STATIC_BASE is located at 0x00800000. Might be required to correct   placement of ".rodata" so it lies within 0x8000 of the STATIC_BASE.
warning #10281-D: Section ".bss" requires a STATIC_BASE relative relocation, but is located at 0x0083f624, which is probably out of range of the STATIC_BASE. STATIC_BASE is located at 0x00800000. Might be required to correct   placement of ".bss" so it lies within 0x8000 of the STATIC_BASE.
warning #10281-D: Section ".rodata" requires a STATIC_BASE relative relocation, but is located at 0x0083f650, which is probably out of range of the STATIC_BASE. STATIC_BASE is located at 0x00800000. Might be required to correct   placement of ".rodata" so it lies within 0x8000 of the STATIC_BASE.
warning #10281-D: Section ".bss" requires a STATIC_BASE relative relocation, but is located at 0x0083f624, which is probably out of range of the STATIC_BASE. STATIC_BASE is located at 0x00800000. Might be required to correct   placement of ".bss" so it lies within 0x8000 of the STATIC_BASE.
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "mbx_tskHostMessageHandler" overflowed; the 16-bit relocated address 0xfd94 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x00000044, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "sem_tskHostMessageHandler" overflowed; the 16-bit relocated address 0xfd96 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x00000048, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "sem_msgToHostStall" overflowed; the 16-bit relocated address 0xfd98 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x00000050, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "TxPut" overflowed; the 16-bit relocated address 0xfd8c is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x00000058, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "RxGet" overflowed; the 16-bit relocated address 0xfd8b is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x00000060, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "TxGet" overflowed; the 16-bit relocated address 0xfd8d is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x0000006c, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "mbx_tskHostMessageHandler" overflowed; the 16-bit relocated address 0xfd94 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x00000070, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "mbx_tskIpcMessageRx" overflowed; the 16-bit relocated address 0xfd95 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x00000080, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "RxPut" overflowed; the 16-bit relocated address 0xfd8a is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x00000084, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "sem_tskHostMessageHandler" overflowed; the 16-bit relocated address 0xfd96 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000a0, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "TxPut" overflowed; the 16-bit relocated address 0xfd8c is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000a8, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "RxGet" overflowed; the 16-bit relocated address 0xfd8b is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000b0, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "sem_msgToHostStall" overflowed; the 16-bit relocated address 0xfd98 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000b8, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "TxGet" overflowed; the 16-bit relocated address 0xfd8d is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000c0, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "mbx_tskHostMessageHandler" overflowed; the 16-bit relocated address 0xfd94 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000c4, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "mbx_tskIpcMessageRx" overflowed; the 16-bit relocated address 0xfd95 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000cc, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "sem_wpcComBenchmark" overflowed; the 16-bit relocated address 0xfd97 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000e0, section = ".text")
"../pcielib.cpp", line 42: warning #17003-D: relocation from function "__sti___11_pcielib_cpp_9b0c8a02" to symbol "RxPut" overflowed; the 16-bit relocated address 0xfd8a is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./pcielib.obj", offset = 0x000000e8, section = ".text")
"C:/ti/bios_6_33_06_50/packages/ti/sysbios/timers/timer64/Timer.h", line 856: warning #17003-D: relocation from function "timerFunc" to symbol "debug_GPIOstate" overflowed; the 18-bit relocated address 0x3f640 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_B' (11), file = "./main.obj", offset = 0x000001f0, section = ".text")
"C:/ti/bios_6_33_06_50/packages/ti/sysbios/timers/timer64/Timer.h", line 856: warning #17003-D: relocation from function "timerFunc" to symbol "debug_GPIOstate" overflowed; the 18-bit relocated address 0x3f640 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_B' (11), file = "./main.obj", offset = 0x0000020c, section = ".text")
"C:/ti/bios_6_33_06_50/packages/ti/sysbios/timers/timer64/Timer.h", line 856: warning #17003-D: relocation from function "timerFunc" to symbol "debug_GPIOstate" overflowed; the 18-bit relocated address 0x3f640 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_B' (11), file = "./main.obj", offset = 0x00000218, section = ".text")
"C:/ti/bios_6_33_06_50/packages/ti/sysbios/timers/timer64/Timer.h", line 856: warning #17003-D: relocation from function "main" to symbol "debug_GPIOstate" overflowed; the 18-bit relocated address 0x3f640 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_B' (11), file = "./main.obj", offset = 0x00000244, section = ".text")
"..\dummy_CPciBackEndIpc.h", line 321: warning #17003-D: relocation from function "tskHandler" to symbol "g_u32DebugChecksum" overflowed; the 16-bit relocated address 0xfd8e is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./main.obj", offset = 0x0000022c, section = ".text:_ZN14CPciBackEndIpc10tskHandlerEv")
"..\dummy_CPciBackEndIpc.h", line 83: warning #17003-D: relocation from function "RxWpcComBenchmarkMsg" to symbol "g_u32BenchmarkMsgLen" overflowed; the 16-bit relocated address 0xfd92 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./main.obj", offset = 0x00000044, section = ".text:_ZN14CPciBackEndIpc20RxWpcComBenchmarkMsgERK14CDSPvectorLinkIjE")
"..\dummy_CPciBackEndIpc.h", line 121: warning #17003-D: relocation from function "RxWpcComBenchmarkMsg" to symbol "g_u32BenchmarkMsgLen" overflowed; the 16-bit relocated address 0xfd92 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./main.obj", offset = 0x000001f8, section = ".text:_ZN14CPciBackEndIpc20RxWpcComBenchmarkMsgERK14CDSPvectorLinkIjE")
"..\dummy_CPciBackEndIpc.h", line 151: warning #17003-D: relocation from function "RxFpgaProgMsg" to symbol "g_u32DebugAddressError" overflowed; the 16-bit relocated address 0xfd8f is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./main.obj", offset = 0x000000a8, section = ".text:_ZN14CPciBackEndIpc13RxFpgaProgMsgERK14CDSPvectorLinkIjE")
"C:/DSPCode/WPM3Aplus/INF/Trunk/dev/PCI/Example_54151/WPM3+ PCIE/dummy_CPciBackEndIpc.cpp", line 38: warning #17003-D: relocation from function "TxWpcComBenchmark" to symbol "g_u32BenchmarkMsgLen" overflowed; the 16-bit relocated address 0xfd92 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./dummy_CPciBackEndIpc.obj", offset = 0x00000024, section = ".text")
"C:/DSPCode/WPM3Aplus/INF/Trunk/dev/PCI/Example_54151/WPM3+ PCIE/dummy_CPciBackEndIpc.cpp", line 40: warning #17003-D: relocation from function "TxWpcComBenchmark" to symbol "sem_wpcComBenchmark" overflowed; the 16-bit relocated address 0xfd97 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./dummy_CPciBackEndIpc.obj", offset = 0x0000004c, section = ".text")
"C:/ti/pdk_C6670_1_1_1_4/packages/ti/csl/csl_gpioAux.h", line 378: warning #17003-D: relocation from function "CheckFpgaName" to symbol "g_u8FpgaVersionFraction" overflowed; the 18-bit relocated address 0x3f642 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_B' (11), file = "./FpgaConfiguration.obj", offset = 0x00000340, section = ".text")
"C:/ti/pdk_C6670_1_1_1_4/packages/ti/csl/csl_gpioAux.h", line 378: warning #17003-D: relocation from function "CheckFpgaName" to symbol "g_u8FpgaVersionInteger" overflowed; the 18-bit relocated address 0x3f643 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_B' (11), file = "./FpgaConfiguration.obj", offset = 0x00000358, section = ".text")
"C:/ti/pdk_C6670_1_1_1_4/packages/ti/csl/csl_gpioAux.h", line 378: warning #17003-D: relocation from function "CheckFpgaName" to symbol "g_u16FpgaAppId" overflowed; the 17-bit relocated address 0x1fb22 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_H' (12), file = "./FpgaConfiguration.obj", offset = 0x00000398, section = ".text")
"C:/ti/pdk_C6670_1_1_1_4/packages/ti/csl/csl_gpioAux.h", line 378: warning #17003-D: relocation from function "CheckFpgaName" to symbol "g_u16FpgaAppId" overflowed; the 17-bit relocated address 0x1fb22 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_H' (12), file = "./FpgaConfiguration.obj", offset = 0x000003b8, section = ".text")
"C:/ti/pdk_C6670_1_1_1_4/packages/ti/csl/csl_gpioAux.h", line 378: warning #17003-D: relocation from function "CheckFpgaName" to symbol "g_u8FpgaVersionInteger" overflowed; the 18-bit relocated address 0x3f643 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_B' (11), file = "./FpgaConfiguration.obj", offset = 0x000003c0, section = ".text")
"C:/ti/pdk_C6670_1_1_1_4/packages/ti/csl/csl_gpioAux.h", line 378: warning #17003-D: relocation from function "CheckFpgaName" to symbol "g_u8FpgaVersionFraction" overflowed; the 18-bit relocated address 0x3f642 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_B' (11), file = "./FpgaConfiguration.obj", offset = 0x000003d4, section = ".text")
"C:/ti/pdk_C6670_1_1_1_4/packages/ti/csl/csl_gpioAux.h", line 378: warning #17003-D: relocation from function "__sti___21_FpgaConfiguration_cpp_622a8d44" to symbol "__dso_handle" overflowed; the 16-bit relocated address 0xfd93 is too large to encode in the 15-bit unsigned field (type = 'R_C6000_SBR_U15_W' (13), file = "./FpgaConfiguration.obj", offset = 0x000006b4, section = ".text")

Here is the code I use to access the pre-computed checksum:

extern far uint32_t _ChecksumVal;

int main()
{
	const char *running = "running";
	uint32_t u32ChecksumDif = 0;
	uint32_t far *pu32PrecompChecksum;
	debug_GPIOstate = false;
#ifdef SIMULATION
	if(SetupOutbound_debug()) {
#else
    if(!CPciHostRegs::SetupOutbound()) {
    	System_printf("Error: PCIE buffer pointers read from Host are invalid!\n");
    } else {
    	for(int i = 0; i < 7; i++) {
			corestatus[i] = running[i];
		}
// IF I COMMENT OUT THESE TWO LINES, THE WARNINGS GO AWAY
    	pu32PrecompChecksum = &_ChecksumVal;
    	u32ChecksumDif = CalculateChecksum() - *pu32PrecompChecksum;

Here is my custom linker command file:

SECTIONS // part of checksum
{
	GROUP
 	{
 		.vecs		palign = 1024
  		.text		palign = 32
		.codeEnd  	palign = 32
 	} load = L2SRAM, START(_ChecksumCodeStart), END(_ChecksumCodeEnd)
}

SECTIONS // part of checksum
{
	GROUP
	{
		// Begin INITIALIZED sections
		// palign = 8 makes sure that the sections are on the proper bounaries
		// so no holes are created that can't be filled
		.switch    	palign = 8
		.const     	palign = 16
		//.checksum  	palign = 8
	} load = L2SRAM, START(_ChecksumDataStart), END(_ChecksumDataEnd)
}
//SECTIONS
//{
//	GROUP
//	{
//		.checksum
//		.bss
//		.neardata
//		.rodata
//	} load = L2SRAM
//}
SECTIONS // part of checksum
{
	.init_array: load = L2SRAM, START(_InitArrayStart), END(_InitArrayEnd)
}
SECTIONS // part of checksum
{
	.cinit: load = L2SRAM, START(_CinitStart), END(_CinitEnd)
}
SECTIONS // part of checksum
{
	.SharedCode: load = MSMCSRAM, START(_SharedCodeStart), END(_SharedCodeEnd)
}
SECTIONS // part of checksum
{
	.ExtCode:  load = DDR3, START(_ExtCodeStart), END(_ExtCodeEnd)
}
SECTIONS // this section is NOT part of checksum
{
    .SharedData: load = MSMCSRAM, START(_SharedDataStart), END(_SharedDataEnd)
}
SECTIONS // this section is NOT part of checksum
{
	.ModuleSharedMemTable: load = PCIE_SHARED, START(_ModuleSharedMemTableStart)//> PCIE_SHARED, START(_ModuleSharedMemTableStart)
}

In my .cfg file I exclude certain sections from being placed automatically via these lines:

var excludeSections = "^.cinit$|^\.SharedData$|^\.const$|^\.text$|^\.switch$|^\.vecs$|^\.init_array$;//|^\.bss$|^\.neardata|^\.rodata$";
Program.sectionsExclude = excludeSections;

And my pre-computed checksum is written to an assembly file at compile-time by a script. The assembly file looks like this:

   .sect   ".checksum"
   .global	_u32Checksum, _ChecksumVal
_ChecksumVal:
_u32Checksum:	



; NOTE -- This file is auto generated with TiDspChecksumGenerator
   .int  0x2ECED19F 





   .end	

Here is what my map file looks like when I DO NOT use mem_model:data = far

OUTPUT FILE NAME:   <pcie.out>
ENTRY POINT SYMBOL: "_c_int00"  address: 00820660


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
  PCIE_SHARED           00800000   00000040  00000034  0000000c  RW X
  L2SRAM                00800040   000fffc0  0003fdcd  000c01f3  RW X
  MSMCSRAM              0c000000   00200000  00000078  001fff88  RW X
  DDR3                  80000000   20000000  00000060  1fffffa0  RW X


SEGMENT ALLOCATION MAP

run origin  load origin   length   init length attrs members
----------  ----------- ---------- ----------- ----- -------
00800000    00800000    00000030   00000030    rw-
  00800000    00800000    00000030   00000030    rw- .neardata
00800030    00800030    00000004   00000004    r--
  00800030    00800030    00000004   00000004    r-- .checksum
00800040    00800040    00000339   00000000    rw-
  00800040    00800040    00000339   00000000    rw- .far.1
00800380    00800380    00000080   00000080    rw-
  00800380    00800380    00000080   00000080    rw- .fardata.1
00800400    00800400    000264e0   000264e0    r-x
  00800400    00800400    00000400   00000400    r-x .vecs
  00800800    00800800    00025e60   00025e60    r-x .text
  00826660    00826660    00000280   00000280    r-x .codeEnd
008268e0    008268e0    000166b0   00000000    rw-
  008268e0    008268e0    000126b0   00000000    rw- .far.2
  00838f90    00838f90    00004000   00000000    rw- .stack
0083cf90    0083cf90    00001960   00001960    r--
  0083cf90    0083cf90    00000040   00000040    r-- .switch
  0083cfd0    0083cfd0    00001920   00001920    r-- .const
0083e8f0    0083e8f0    00000d24   00000c04    rw-
  0083e8f0    0083e8f0    00000c04   00000c04    rw- .fardata.2
  0083f4f4    0083f4f4    00000120   00000000    rw- .cio
0083f614    0083f614    00000010   00000010    r--
  0083f614    0083f614    00000010   00000010    r-- .init_array
0083f624    0083f624    0000002c   00000000    rw-
  0083f624    0083f624    0000002c   00000000    rw- .bss
0083f650    0083f650    0000001c   0000001c    r--
  0083f650    0083f650    0000001c   0000001c    r-- .rodata
0083f66c    0083f66c    000007a8   000007a8    r--
  0083f66c    0083f66c    000007a8   000007a8    r-- .cinit
0c000000    0c000000    00000060   00000060    r-x
  0c000000    0c000000    00000060   00000060    r-x .SharedCode
0c000080    0c000080    00000018   00000018    rw-
  0c000080    0c000080    00000018   00000018    rw- .SharedData
80000000    80000000    00000060   00000060    r-x
  80000000    80000000    00000060   00000060    r-x .ExtCode

And this is what the map file looks like when I DO use mem_model:data = far

OUTPUT FILE NAME:   <pcie.out>
ENTRY POINT SYMBOL: "_c_int00"  address: 00820840


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
  PCIE_SHARED           00800000   00000040  00000024  0000001c  RW X
  L2SRAM                00800040   000fffc0  0003ffd8  000bffe8  RW X
  MSMCSRAM              0c000000   00200000  00000078  001fff88  RW X
  DDR3                  80000000   20000000  00000060  1fffffa0  RW X


SEGMENT ALLOCATION MAP

run origin  load origin   length   init length attrs members
----------  ----------- ---------- ----------- ----- -------
00800000    00800000    0000001c   0000001c    r--
  00800000    00800000    0000001c   0000001c    r-- .rodata
0080001c    0080001c    00000004   00000000    rw-
  0080001c    0080001c    00000004   00000000    rw- .bss
00800020    00800020    00000004   00000004    r--
  00800020    00800020    00000004   00000004    r-- .checksum
00800040    00800040    0000034c   00000000    rw-
  00800040    00800040    0000034c   00000000    rw- .far.1
00800390    00800390    00000070   00000070    rw-
  00800390    00800390    00000070   00000070    rw- .fardata.1
00800400    00800400    00026720   00026720    r-x
  00800400    00800400    00000400   00000400    r-x .vecs
  00800800    00800800    000260a0   000260a0    r-x .text
  008268a0    008268a0    00000280   00000280    r-x .codeEnd
00826b20    00826b20    000166d0   00000000    rw-
  00826b20    00826b20    000126d0   00000000    rw- .far.2
  008391f0    008391f0    00004000   00000000    rw- .stack
0083d1f0    0083d1f0    00001960   00001960    r--
  0083d1f0    0083d1f0    00000040   00000040    r-- .switch
  0083d230    0083d230    00001920   00001920    r-- .const
0083eb50    0083eb50    00000d64   00000c44    rw-
  0083eb50    0083eb50    00000c44   00000c44    rw- .fardata.2
  0083f794    0083f794    00000120   00000000    rw- .cio
0083f8b4    0083f8b4    00000768   00000768    r--
  0083f8b4    0083f8b4    00000010   00000010    r-- .init_array
  0083f8c4    0083f8c4    00000758   00000758    r-- .cinit
0c000000    0c000000    00000060   00000060    r-x
  0c000000    0c000000    00000060   00000060    r-x .SharedCode
0c000080    0c000080    00000018   00000018    rw-
  0c000080    0c000080    00000018   00000018    rw- .SharedData
80000000    80000000    00000060   00000060    r-x
  80000000    80000000    00000060   00000060    r-x .ExtCode
  • You must place .bss, .neardata, and .rodata together, and they must all fit in the range of near addressing.  This is usually accomplished with a GROUP in the linker command file.  I don't see why you'd need to co-locate the .checksum section with near data.  Why can't it be far data?

  • Thank you for the prompt reply. I understand that these sections must be grouped together. The linker.cmd file generated by CCS creates this group automatically. What I don't understand is why is it that when I add a .checksum section to L2SRAM, STATIC_BASE gets set to something extremely far from .bss/.neardata/.rodata.

    I have been trying all sorts of things to get this project to work, and have come up with this:

    <Linking>
    
    This application has requested the Runtime to terminate it in an unusual way.
    Please contact the application's support team for more information.
    c60_abi.c:366:internal warning #10282: (".checksum")
    warning #10281-D: Section ".bss" requires a STATIC_BASE relative relocation, but is located at 0x0083d30c, which is probably out of range of the STATIC_BASE. STATIC_BASE is located at 0x00000000. Might be required to correct   placement of ".bss" so it lies within 0x8000 of the STATIC_BASE.
    warning #10281-D: Section ".neardata" requires a STATIC_BASE relative relocation, but is located at 0x0083d334, which is probably out of range of the STATIC_BASE. STATIC_BASE is located at 0x00000000. Might be required to correct   placement of ".neardata" so it lies within 0x8000 of the STATIC_BASE.
    warning #10281-D: Section ".rodata" requires a STATIC_BASE relative relocation, but is located at 0x0083d364, which is probably out of range of the STATIC_BASE. STATIC_BASE is located at 0x00000000. Might be required to correct   placement of ".rodata" so it lies within 0x8000 of the STATIC_BASE.
    ELFLNK/table.c:4061:internal fatal error #10220: (".checksum:Checksum.obj")
    
    INTERNAL ERROR: C:\ti\C6000 Code Generation Tools 7.4.2\bin\lnk6x.exe aborted
    
    
    
    >> Compilation failure
    This is a serious problem.  Please contact Customer
    Support with this message and a copy of the input file
    and help us to continue to make the tools more robust.

    Please let me know what else I can provide to help diagnose this issue.

  • The custom linker command file you posted to this thread has the "near" group commented out, which suggests that CCS may have created that group automatically, but it got removed somewhere along the way.

    The error messages in your latest post show that STATIC_BASE is at 0x00000000, but I don't see any section which got allocated to 0x00000000.  The linker will assign the static base symbol to the starting address of the  near data section closest to the start of memory (0x00000000).  Given the linker map files you have posted, there is no configured memory at location 0x00000000, so it doesn't seem possible that STATIC_BASE should appear at address 0x00000000.

    Make sure you are explicitly placing .checksum through the linker command file.  Also make sure you include an explicit group for the near data.  If the error persists, please post the linker command file, the linker map file, and the linker error messages.

  • I'm not sure why internal error 10282 failed to print in its entirety, but it should be:

    "While defining Static Base symbol, (".checksum") not placed. It must have a run address to allow definition of __TI_STATIC_BASE__."

    This suggests that the linker thinks .checksum is a near data section; I don't know why that would be.

  • I modified my .cfg file to exclude .bss, .neardata, .rodata from the auto-generated linker.cmd. I then grouped these sections along with .checksum in my own checksum.cmd. This results in a project that builds without errors/warnings. However, as soon as I change my code to address the .checksum section in any way, the section changes from PROGBITS to NOBITS. So yes, while I can hack around the problem of the linker placing sections too far from each other when left to its own devices, I still cannot read from .checksum!

    extern far uint32_t _ChecksumVal;
    // .....
    int main()
    {
    	const char *running = "running";
    	uint32_t u32ChecksumDif = 0;
    	uint32_t far* pu32PrecompChecksum;
    	debug_GPIOstate = false;
    #ifdef SIMULATION
    	if(SetupOutbound_debug()) {
    #else
        if(!CPciHostRegs::SetupOutbound()) {
        	System_printf("Error: PCIE buffer pointers read from Host are invalid!\n");
        } else {
        	for(int i = 0; i < 7; i++) {
    			corestatus[i] = running[i];
    		}
        	//pu32PrecompChecksum = &_ChecksumVal; // <-- UNCOMMENTING THIS LINE RESULTS IN .checksum = NOBITS
        	u32ChecksumDif = CalculateChecksum();// - *pu32PrecompChecksum;
        	dummy_Ipc.SendChecksum(u32ChecksumDif, 0,0,1);
    #endif
        	BIOS_start();        // enable interrupts and start SYS/BIOS */
        	ExternalDataVerify();
        	SharedDataVerify();
    	}
        return 0;
    }

    Here is what the ELF file looks like using readelf with the above line in main() commented out: (note line 15)

    There are 43 section headers, starting at offset 0x3f43f8:
    
    Section Headers:
      [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
      [ 0]                   NULL            00000000 000000 000000 00      0   0  0
      [ 1] .ti.decompress    NOBITS          00000000 000000 000000 00      0   0  1
      [ 2] .stack            NOBITS          00838f70 038f70 004000 00  WA  0   0  8
      [ 3] .pinit            NOBITS          00000000 000000 000000 00      0   0  1
      [ 4] .data             NOBITS          00000000 000000 000000 00   W  0   0  1
      [ 5] .sysmem           NOBITS          00000000 000000 000000 00      0   0  1
      [ 6] .args             PROGBITS        00800040 000000 000000 00      0   0  4
      [ 7] .ti.handler_table NOBITS          00000000 000000 000000 00      0   0  1
      [ 8] xdc.meta          PROGBITS        00800040 028ae0 0000f8 00      0   0  8
      [ 9] xdc.noload        PROGBITS        00800040 028bd8 001178 00      0   0  8
      [10] .vecs             PROGBITS        00800400 000400 000400 00  AX  0   0 1024
      [11] .text             PROGBITS        00800800 000800 025e40 00  AX  0   0 32
      [12] .codeEnd          PROGBITS        00826640 026640 000280 00  AX  0   0 32
      [13] .switch           PROGBITS        0083cf70 0268c0 000040 00   A  0   0  8
      [14] .const            PROGBITS        0083cfb0 026900 001920 00   A  0   0 16
      [15] .checksum PROGBITS 0083f5f4 028220 000004 00 A 0 0 4
      [16] .bss              NOBITS          0083f5f8 028224 00002c 00  WA  0   0  4
      [17] .neardata         NOBITS          0083f624 028250 000030 00  WA  0   0  4
      [18] .rodata           NOBITS          0083f654 028224 00001c 00   A  0   0  4
      [19] .init_array       PROGBITS        0083f670 028224 000010 00  WA  0   0  4
      [20] .cinit            PROGBITS        0083f680 028234 000798 00   A  0   0  4
      [21] .SharedCode       PROGBITS        0c000000 0289e0 000060 00  AX  0   0 32
      [22] .ExtCode          PROGBITS        80000000 028a80 000060 00  AX  0   0 32
      [23] .SharedData       NOBITS          0c000080 028a80 000018 00  WA  0   0 128
      [24] .ModuleSharedMemT NOBITS          00800000 029d50 000000 00   A  0   0  1
      [25] .debug_info       PROGBITS        00000000 029d50 173527 00      0   0  1
      [26] .debug_line       PROGBITS        00000000 19d277 028f97 00      0   0  1
      [27] .debug_frame      PROGBITS        00000000 1c620e 01a899 00      0   0  1
      [28] .debug_abbrev     PROGBITS        00000000 1e0aa7 0286f9 00      0   0  1
      [29] .debug_pubnames   PROGBITS        00000000 2091a0 00330d 00      0   0  1
      [30] .debug_aranges    PROGBITS        00000000 20c4ad 004d20 00      0   0  1
      [31] .debug_str        PROGBITS        00000000 2111cd 0e34e9 00      0   0  1
      [32] .debug_pubtypes   PROGBITS        00000000 2f46b6 0accd6 00      0   0  1
      [33] .fardata.1        NOBITS          00800380 000038 000080 00  WA  0   0  8
      [34] .fardata.2        NOBITS          0083e8d0 028220 000c04 00  WA  0   0  8
      [35] .far.1            NOBITS          00800040 000038 000339 00  WA  0   0  8
      [36] .far.2            NOBITS          008268c0 0268c0 0126b0 00  WA  0   0  8
      [37] .cio              NOBITS          0083f4d4 028e24 000120 00  WA  0   0  4
      [38] .c6xabi.attribute C6000_ATTRIBUTE 00000000 3a138c 00003b 00      0   0  0
      [39] .symtab           SYMTAB          00000000 3a13c8 033440 10     41 11878  0
      [40] .TI.section.flags LOPROC+f000005  00000000 3d4808 000026 00      0   0  0
      [41] .strtab           STRTAB          00000000 3d482e 01f86e 01   S  0   0  0
      [42] .shstrtab         STRTAB          00000000 3f409c 0001bc 01   S  0   0  0
    Key to Flags:
      W (write), A (alloc), X (execute), M (merge), S (strings)
      I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
      O (extra OS processing required) o (OS specific), p (processor specific)

    Here is what I get when the above line in main() is not commented out: (note line 15)

    $ readelf -S pcie.out
    There are 43 section headers, starting at offset 0x3f4474:
    
    Section Headers:
      [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
      [ 0]                   NULL            00000000 000000 000000 00      0   0  0
      [ 1] .ti.decompress    NOBITS          00000000 000000 000000 00      0   0  1
      [ 2] .stack            NOBITS          00838f90 038f90 004000 00  WA  0   0  8
      [ 3] .pinit            NOBITS          00000000 000000 000000 00      0   0  1
      [ 4] .data             NOBITS          00000000 000000 000000 00   W  0   0  1
      [ 5] .sysmem           NOBITS          00000000 000000 000000 00      0   0  1
      [ 6] .args             PROGBITS        00800040 000000 000000 00      0   0  4
      [ 7] .ti.handler_table NOBITS          00000000 000000 000000 00      0   0  1
      [ 8] xdc.meta          PROGBITS        00800040 028ae0 0000f8 00      0   0  8
      [ 9] xdc.noload        PROGBITS        00800040 028bd8 001178 00      0   0  8
      [10] .vecs             PROGBITS        00800400 000400 000400 00  AX  0   0 1024
      [11] .text             PROGBITS        00800800 000800 025e60 00  AX  0   0 32
      [12] .codeEnd          PROGBITS        00826660 026660 000280 00  AX  0   0 32
      [13] .switch           PROGBITS        0083cf90 0268e0 000040 00   A  0   0  8
      [14] .const            PROGBITS        0083cfd0 026920 001920 00   A  0   0 16
      [15] .checksum         NOBITS          0083f614 028240 000004 00   A  0   0  4
      [16] .bss              NOBITS          0083f618 028240 00002c 00  WA  0   0  4
      [17] .neardata         NOBITS          0083f644 028240 000030 00  WA  0   0  4
      [18] .rodata           NOBITS          0083f674 028240 00001c 00   A  0   0  4
      [19] .init_array       PROGBITS        0083f690 028240 000010 00  WA  0   0  4
      [20] .cinit            PROGBITS        0083f6a0 028250 0007a8 00   A  0   0  4
      [21] .SharedCode       PROGBITS        0c000000 028a00 000060 00  AX  0   0 32
      [22] .ExtCode          PROGBITS        80000000 028a80 000060 00  AX  0   0 32
      [23] .SharedData       NOBITS          0c000080 028a80 000018 00  WA  0   0 128
      [24] .ModuleSharedMemT NOBITS          00800000 029d50 000000 00   A  0   0  1
      [25] .debug_info       PROGBITS        00000000 029d50 173583 00      0   0  1
      [26] .debug_line       PROGBITS        00000000 19d2d3 028f98 00      0   0  1
      [27] .debug_frame      PROGBITS        00000000 1c626b 01a899 00      0   0  1
      [28] .debug_abbrev     PROGBITS        00000000 1e0b04 0286f9 00      0   0  1
      [29] .debug_pubnames   PROGBITS        00000000 2091fd 00330d 00      0   0  1
      [30] .debug_aranges    PROGBITS        00000000 20c50a 004d20 00      0   0  1
      [31] .debug_str        PROGBITS        00000000 21122a 0e34e9 00      0   0  1
      [32] .debug_pubtypes   PROGBITS        00000000 2f4713 0accd6 00      0   0  1
      [33] .fardata.1        NOBITS          00800380 000038 000080 00  WA  0   0  8
      [34] .fardata.2        NOBITS          0083e8f0 028240 000c04 00  WA  0   0  8
      [35] .far.1            NOBITS          00800040 000038 000339 00  WA  0   0  8
      [36] .far.2            NOBITS          008268e0 0268e0 0126b0 00  WA  0   0  8
      [37] .cio              NOBITS          0083f4f4 028e44 000120 00  WA  0   0  4
      [38] .c6xabi.attribute C6000_ATTRIBUTE 00000000 3a13e9 00003b 00      0   0  0
      [39] .symtab           SYMTAB          00000000 3a1424 033440 10     41 11878  0
      [40] .TI.section.flags LOPROC+f000005  00000000 3d4864 000026 00      0   0  0
      [41] .strtab           STRTAB          00000000 3d488a 01f86e 01   S  0   0  0
      [42] .shstrtab         STRTAB          00000000 3f40f8 0001bc 01   S  0   0  0
    Key to Flags:
      W (write), A (alloc), X (execute), M (merge), S (strings)
      I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
      O (extra OS processing required) o (OS specific), p (processor specific)
  • Ilya Bludov said:
    However, as soon as I change my code to address the .checksum section in any way, the section changes from PROGBITS to NOBITS.

    That's really strange...

    Note that in ELF, by default the linker will discard unreferenced sections.  Are you sure there is no other reference to .checksum somewhere else in the program?

    So far, I have been unable to construct a test case which displays the same symptoms.  I suspect there is some detail that we are making opposite assumptions about, and I'm a bit confused about exactly what your linker command file looks like when the error occurs.

  • It turns out I can address the .checksum section from a .cpp file that does not contain main(). But when I address .checksum from main(), that's when the section changes to NOBITS. I'm really not sure why this happens. When I look at the memory location for .checksum using an emulator, the correct checksum value is present, even if the section is NOBITS. But it does screw up my ELF parsing.