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C64x+ Cycle accurate simulator speed

Jayakrishnan
Expert 2790 points


Hi

I have a custom H264 Encoder source which I wanted to run on DM648 board. Before using xds 510 usb emulator, I wanted to check the encoder's performance on simulator. So I ported the code in to ccsv5.5 and copiled and the code is working fine. The problem is I am getting a very low fps (0.11 fps).

When I made a search about this problem, I found the following wiki

http://processors.wiki.ti.com/index.php/Simulator_Cycle_Accuracy

So I guessed the problem was with the simulator CPU clock. So, I modified the cpu clock from 50 ->1000 in the file

C:\ti\ccsv5\ccs_base\simulation\bin\configurations\tisim_c64plus_cpu.cfg

//! Module Type.

TYPE CPU;

CLOCK_FREQ 1000;

    SUPPORTS_MEM_STAT OFF;

But there was no change. Still  the fps is same.

1. Am I following the correct steps?

2. Is it possible to get a better fps with simulator? If so, how?

Best Regards

JK

 

 

 

  • 0
    TI__Prodigy 520 points

    Hi JK,

         Can you please confirm which Simulator configuration you are using. If it is the C64x+ CPU configuration, then this does not have any memory specific latency and would contain only CPU cycle.

    Again the CPU model supported in CCS is very an accurate model and hence I do expect similar or worse number in the board.

    Note :Also make sure you are running the application in optimized mode.

     

    BR/Abhilash

  • 0 in reply to a0756958
    Expert 2790 points

    Hi Abhilash,

    I am using C:\ti\ccsv5\ccs_base\simulation\bin\configurations\tisim_c64plus_cpu.cfg  file. I confirmed this , because when I changed  the MEM_USAGE_LIMIT     value , it got reflected in the CCS warning. (this warning appeared  when my heap size was smaller). More over I increased the value of CLOCK_FREQ in all the config files  preset in that folder. But no effect.

    Attached this file.4846.tisim_c64plus_cpu.cfg

    So do you mean , whatever figures I got ( 0.1 fps)  is the expected one? Why?

    Why do you expect similar results in board also?

    Does Cycle accurate mean, the encoding speed will be slow?  What does

    CLOCK_FREQ 50 ;  mean in the cfg file then?

    Pls explain.

    Best Regards

    JK

     

  • 0 in reply to Jayakrishnan
    TI__Prodigy 520 points

    Sorry. I think , I got your question now. I assume you are not worried about the accuracy , but more of the speed at which the simulator is running.

    Can you please provide me the below information to see if the speed is good.

    - Number of CPU instruction run by the application

    - Simulation Time in sec.

    Just want to calculate the MIPS(Instructions run per second) and see if it matches with what is expected from the simulator

    Or if you can share the application, I could try to find out MIPs.

    BR/Abhilash

  • 0 in reply to a0756958
    Expert 2790 points

    HI Abhilash

    I roughly calculated the MIPS. It is too low. It is 3.3 MIPS or even below.

    Don't know why.

    Best Regards

    JK

  • 0 in reply to Jayakrishnan
    Expert 2790 points

    Hi Abhilash

    Any information ?

    Best Regards

    JK

  • 0 in reply to Jayakrishnan
    TI__Prodigy 520 points

    JK, I am checking this. Is it possible to share the out file.

    BR/Abhilash

  • 0 in reply to a0756958
    Expert 2790 points

    Hi Abhilash

    Sorry. I can't provide the source or binary, as it is against my company's policy. Hope you will understand.

    Best Regards

    JK

  • 0 in reply to Jayakrishnan
    TI__Prodigy 520 points

    JK,

       C64x+ CPU simulator runs currently at ~3 MIPS. So the number you are getting as per our expectation.

    Now, we have some speed enabler which is not productized on C64x+.  The cycle numbers are not reliable with this setting. So to compute cycle number please disable this.

    To enable this you would need to edit the configuration file tisim_c64plus_cpu.cfg 

    Please add the below lines after the line "MODULE C64xplus;"

    MODULE HPS2;
             MAX_BLOCK_SIZE_HINT 65536; // 64KB, in bytes
             BLOCK_HIT_THRESHOLD 2000;
             SPLOOP OFF;
             CODE_COVERAGE ON;
    END HPS2;

    We have observed a speed improvement of 1.6x times (3.0 MIPS to 5MIPS) on a Matrix Multiplication.

    Please try this and see if you are getting similar improvement. Please share the result

    BR/Abhilash