Something wrong with the XDS100v1 schematics ??

ck.hk

There is something I don't understand about the design of XDS100v1.

Below is a partial schematics of the XDS100v1.

The output to T_TCK, T_TMS, T_TDI, T_TRST_N are connected to 74ACT08 (5V supply) through a bus switch with a on resistance less than 22 Ohm maximum for Vcc = 4V. 280x DSP clearly state that the inputs are not 5V tolerance. How can it supports 1.8V or 3.3V DSP? Am I missing something?

over 15 years ago

0 desouza over 15 years ago

TI__Guru**** 171104 points

Hi,

Maybe the CBT is doing the trick. I know that the OE can be used to bias the internal FETs (check this app note).

I don't know all the details, but I see 5V on pins 6, 9, etc and 3.3V on the corresponding outputs of the XDS100. However the F2808 (and typically several other boards) have a CBTLV in the JTAG interface, which is probably acting as an extra protection.

Cheers,

Rafael