Hi
Cache tuning tool is not supported in CCS5.5 . What are the other methods available for cache optimization in CCS 5.5?
--JK
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Hi
Cache tuning tool is not supported in CCS5.5 . What are the other methods available for cache optimization in CCS 5.5?
--JK
Hi JK,
Here's an extract:
http://processors.wiki.ti.com/index.php/GSG:CCSv5_Overview
Regards,
Gautam
Hi Gautam,
Thanks.
I don't have trace analyser with me. I am looking for method using simulator(64x+ Megamodule cycle accurate simulator). By the way can I use this simulator for DM648? I don't see any Device simulator for DM648 in CCS5.5
Best Regards
JK
JK - You can use the CCS profiler to collect cache information. Also the 7.x version of the compiler has some features to help with cache optimization:
http://processors.wiki.ti.com/index.php/Program_Cache_Layout
However you need to use a simulator that models cache and the 64x mega module sim does not.
Jayakrishnan said:By the way can I use this simulator for DM648?
Sorry, there is no DM648 simulator. I guess the closest thing available is the DM6437 device simulator. I know they are similar but I don't know HOW similar they are (You can ask the folks in the C6000 forums I suppose).
Thanks
ki
Hi Ki
Thanks.
I used CCS5.5 function profiler with 64x+ mega module Cysle accurate simulator to collect L1, L2 cache info.
Do you mean , this is not correct to analyze DM648 cache behaviour? 64x+ cycle accurate simulator doesn't have L1,L2 cache analysis option. I will try DM6437 device simulator.
Best Regards
JK
Jayakrishnan said:I used CCS5.5 function profiler with 64x+ mega module Cysle accurate simulator to collect L1, L2 cache info.
My mistake - the megamodule sim does model cache. You can use that sim for cache benchmarking