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FIR slower than expected in Piccolo

José Ruiz
Prodigy 250 points

Hi,

 

I'm having trouble with TI's FIR library on a 320F2807 (piccolo). The FIR execution time for a test filter with 100 taps is 2.54 us when, according to the documentation, it should be about 50 clock cycles, plus some overhead, for a total of, say, 100 cycles at most, or 1.66 us at 60 MHz. I have experimented with other filter orders and got no consistent results.  I'm measuring execution times with an oscilloscope; the profiler gives essentially random results and I don't trust it.

I have verified that the clocks are correctly set up, and everything is running off of RAM. I'm using CCE 3.3.

I hope someone can give me some insight as to what I'm doing wrong.

 

Thank you!

  • 0
    Prodigy 250 points

    Solved!  My mistake...

     

    The DMAC instruction at the core of the FIR routine needs to access two operands each cycle. Since each RAM block only has a read port, the filter coefficient array and the delay array have to be in different blocks, otherwise an extra cycle is needed, and that was the extra delay I was experiencing: 2 cycles per 2 taps, instead of 1 cycle per 2 taps.

     

    Sorry!