• State
  • Locked Locked
  • Replies 9 replies
  • Subscribers 52 subscribers
  • Views 857 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCSv4 Multi-Core Debug

Eugene K
Expert 1685 points

I have dual core ARM device. My project has code for both cores. I need to be able to debug both CPUs. It looks like CCSv4 only allows to specify one CPU per project to connect and debug . The selection comes from CCXML file which in turn based on TargetDB XML files (to the best of my understanding). I can load OUT files for each device with GEL command. The control of both cores is very difficult and nothing as easy as in CCSv3 where devices can be controlled from the root of the configuration tree. In default CCSv4 configuration both CPU cores are siblings with no root node. Grouping and synchronous mode are lost after device reset. I have posted my experience here .

Is there a method to get desired debug behavior?

Is it possible to redefine target configuration for this device the way that CPU cores are under common root node to which project can be connected and debug commands send to all devices without the need for synchronous mode?

The target device is TMS570_CORTEXR4M3 with SD XDS510 emulator.

Eugene

  • 0
    TI__Mastermind 18130 points

    Eugene,

    I haven't done any work with the multi-core debugging in CCSv4 yet, but have you seen this Wiki article on Multi-core Debug? It may help tie you over until someone more knowledgable can come along and answer specific questions...

  • 0 in reply to TimHarron
    Expert 1685 points

    Tim,

    I've been through this article and multi-core debug options there are the problem I am desribing.  Specially sync command execution.

    The question is if it is possible to get CCSv3 like behavior with different CCXML configuration.

    Thanks,

    Eugene

  • 0 in reply to Eugene K
    TI__Guru**** 463831 points

    Eugene,

    The problem regarding target execution buttons being grey-ed out after a reset when in sync mode, that looks like a bug to me. I do not have my Aries board available to me right now but I did try with a different multi-core target and I was unable to see the issue you described in your original post. I'll try it out on Aries when I have a chance.

    Thanks

    ki

  • 0 in reply to Ki
    TI__Guru**** 463831 points

    Eugene,

    I think what is happening is that on the Aries board, when you do a system reset, the M3 gets held in reset and I can't step/run/halt until it gets released (I have to do a power cycle). What happens with sync mode is that the target execution buttons are available only if execution operations can be run on both cores. Since the M3 is in reset, it gets grey-ed out for both and you have to leave sync mode to be able to send a run/halt command to the R4.

    ki

  • 0 in reply to Ki
    Expert 1685 points

    Ki,

    That was my understanding as well. The matter is more complicated because of the need to program CTI for synchronous debug. CCSv3 can issue 'sync' commands from PDM. The rest of debug logic (non M3) on  Aries is working.

    Something needs to be done in CCSv4. Will it be done through the change in the driver for buttons to stay enabled after system reset or CCXML configuration change may be sufficient?

    Keep in mind that from user perspective, I am not debugging separate targets per project. I am debugging single target with two CPU cores. My Eclipse project represents code for each CPU as separate OUT files. When in the target, these OUT file can only work together. The CCSv4 debug approach with project/non-project debug sessions and single connection or OUT file per CPU is not logically correct in this case.

    Eugene

  • 0 in reply to Eugene K
    TI__Guru**** 463831 points

    We used to have specific sync commands in v4 but we changed this in lieu of a sync mode. I'm not sure what exactly your request is. Do you simply want to be able to have the execution options always available in sync mode even if the M3 will not be able to process it (but the R4 can).

    In regards to you use case for projects - the "debug active project" option to launch a debug session makes sense in such cases as you described where there is a project for a CPU. In your case where it does not apply, you can simply launch a debug session (launch TI debugger) without any project association. This will launch a debug session, but not load any out files. Then you are free to load the the out files to the necessary CPUs.

    Thanks

    ki

     

  • 0 in reply to Ki
    Expert 1685 points

    Ki,

    I can use "Launch TI debugger" option and ignore all other menu options as not applicable to my use case. The summary questions will be:

    1. How to make sync mode default for multi-CPU target in all new workspaces and projects on multiple PCs and in multiple directories?

    2. How to make sure that sync mode is not canceled after system reset?

    3. Are there any plans on extending debug dialog to be able to associate multiple CPUs with  multiple OUT files as debug targets on Eclipse project basis?

    Eugene

  • 0 in reply to Eugene K
    TI__Guru**** 463831 points

    Sync mode persists after a system reset

    I will file enhancement requests for 1 and 3.

    ki

  • 0 in reply to Ki
    Expert 1685 points

    Yes, sync mode persists after system reset but it can not be used for stepping/running Aries. To continue with debugging after reset sync mode has to be disabled. Am I doing something wrong?

    Eugene