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Code Composer Pipelining During Simulation?

Diego15344
Prodigy 10 points
Other Parts Discussed in Thread: TMS320F28335

Hello,

 

I am using a TMS320F28335 DSP and Code Composer Studio v4. I am some code that reads from some pins and then tries to write what is read from the pins. However, the problem I am having is that when I simulate it full speed (and stop at a breakpoint) or let it run on the board, my writting is occuring to fast for the read. In other words, in only works when I step through it one by one in simulation, or if I add about 4-7 NoOp instructions between the read and write. is there anyway I can disable this on the board and/or on the simulation through code composer?

 

Thanks.

  • 0
    TI__Guru* 91940 points

    Diego,

    Hmm I would have expected perhaps the read occuring too fast for the write, not the other way around

    The 28x pipeline looks like this:

    F1     F2       D1     D2      R1      R2      E     W

    Note that R (read) occurs earlier in the pipeline than W (write).    If you single step, the pipeline is flushed - meaning the instruction will be forced to go through the write stage.  If you run, then they will occur in pipeline order. 

    A write/read to the *same* location will always occur in order.

    On the actual device, there are regions of memory that have "write followed by read" pipeline protection where the natural order will be preserved - basically the pipeline will automatically stall for the write to complete before the read begins.  It works for any locations within the protected region.  I don't think the simulator comprehends this.

    If the simulator is not comprehending this, you have:

    <I1> = write

    <I2> = read   <- I2 will reach the read stage of the pipeline before <I1> reaches write

    If you put NOP's between I1 and I2 you force the write to occur before the read.

    -Lori