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SRIO Register View Incorrect in CCSv4

MattB
Expert 2025 points

Hi,

The C6455 SRIO section of the register view in CCS V4.1.0.02003 contains some incorrect register offsets.

This caused me some confusion for a while because I couldn't understand why all 4 ports were initialised when only 1 is supposed to be connected!

Anyway, I'm making progress again now!

Here's a better version of cslr_srio.xml if anyone's interested. I haven't checked it carefully but it can't be any worse!

Perhaps it will make it's way into a future version of CCS!

Matt

  • 0
    TI__Guru**** 171104 points

    Matt,

    Thank you very much for sending your updated file and helping us improve the tool; I will do some internal testing with a C6455 board I have and, if everything is ok, I will let you know and integrate it into the next spin of CCSv4.

    That's one clear benefit of having simpler text-based hardware descriptions instead of proprietary binary files...

    Thank you again,

    Rafael

  • 0 in reply to desouza
    Expert 2025 points

    Hi Rafael,

    desouza said:
    Thank you very much for sending your updated file and helping us improve the tool

    No problem!

    desouza said:
    That's one clear benefit of having simpler text-based hardware descriptions instead of proprietary binary files...

    Yes indeed! Now the problem is finding a low error, low tedium way of entering the data for complex peripherals like SRIO.

    On that note I've just noticed that most (if not all) of the bitenum fields are wrong. I've changed a few (just see if they could work) but sorting them all out will take ages!

    Matt