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C64x+ Cycle Accurate Simulator - Cache

Bubsy
Intellectual 300 points

Good Morning,

I'm using the C64x+ Cycle Accurate Simulator. This one is configured following the C6474 characteristics thanks to the information located here : http://wiki.davincidsp.com/index.php/C64x%2B_Cycle_Accurate_Simulator.

When I configured for L2, the SRAM_START_ADDRESS 0x0080 0000 (see "simc64plus.cfg"), no problem, I see the cache effect on L1. For example, when I call my fonction first, it takes 185 cycles. The second call use only 109 cyles. So, here it's ok. Final cycles saw here, are compliant to simulations done on C64x+ CPU Cycle Accurate Simulator.

But when I change the configuration for L2, the SRAM_START_ADDRESS is set to 0x0082 0000 (see "simc64plus_1.cfg" renamed for post), I continue to see the cache effect on L1 but when I call the same fonction as previous first, it takes 1318 cycles ! The second call use only 1376 cyles !! I don't understand why this address modification leads to this different results.

I send you enclosed the 2 configuration files, I used for the simulator.

D'avance merci

Bubsy

 

 

 

 

 

simc64plus.rar
  • 0
    TI__Intellectual 1380 points

    Hi,

     

    I guess you 'function' is placed in address range from 0x00800000 to 0x0081FFFF (kindly confirm this from your map or linker command file). Hence, when you ranexperiment 1 (where the L2 start address is mapped to 0x00800000), all accesses to the 'function' is a L2 RAM access.

    Whereas in the experiment 2 (where the L2 Start address is mapped to 0x00820000) the 'function' is no-more in L2 RAM space. Probably it might have been mapped to somewhere in external memory or 'simulated' fixed-latency memory. The access to these memories are costlier (in terms of cycle) and hence you notice a bigger number of cycles in experiment 2.

     

    Hope this helps.

     

    Is there a reason to map the L2 RAM start address to 0x00820000? 

     

    Regards,

    Nizam

     

     

  • 0 in reply to Nizamudheen A
    Intellectual 300 points

    Nizam,

    No reason for using the L2 RAM start address to 0x00820000. It was just a mapping test.

    If I summarize, the linker file have to be compliant with the C64x+ Cycle Accurate Simulator configuration. If not, no error message will appear, the result will be good but the cycle and access to these memories will be costlier (in terms of cycle).

    I thank you for this information.

    Cordialement,

    Bubsy