XDS560 - Error initializing emulator

Please provide the following details:

- Setup configuration - CCS .ccxml you are using and ccBoard0.dat file from ccsv4\DebugServer\bin\win32\BrdDat directory

Hi,

The files are attached.

Regards,

Jan-Erik

Jan-Erik,

The board data file you sent has a C55x in it.  Can you confirm that the .ccxml file for the BH560 connected to the M3 is your default target configuration.  

You can open the target configurations view, from the view menu.  Then right click on the ccxml file and mark as default.  If your config is inside of a project right click on the it in the project view and set as active.

John

Hi,

I tested a C55X configuration after the M3 failure.

The M3 configuration is set as the default configuration and the failure is recreated.

The new dat file is attached.

Regards,

Jan-Erik

Jan-Erik,

This one has M3 and BH560 in it so it looks much better (contents below for others watching the thread).  I can't comment on the subpath information in the setup as I have not seen a TUSB9260 before.  Did you get the JTAG information for that device from a datasheet?

John

# config version=3.5

$ uscif

  ecom_drvr=bh560usbm.out

  ecom_port=0

  tclk_program=AUTOMATIC

  tclk_frequency=EXCHANGE

  tdoedge=RISE

$ /

@ icepick_c_0 family=icepick_c subpaths=1

  & subpath_0 address=16 force=yes pseudo=no default=no custom=no

    @ cs_dap_0 family=cs_dap subpaths=1 identify=0

      & subpath_1 address=16 force=no pseudo=yes default=yes custom=yes

        @ cortex_m3_0 family=cortex_mxx identify=0

      & /

  & /

# /

Hi,

The board has a standard 14 pin JTAG connector. The JTAG connector lines are connected dirrectly to the M3. 

I'm using the 20 to 14 pin connector from BH.

I do also get the same failure if I try to connect to a LM3S815 EVM.

Regards,

Jan-Erik

Jan-Erik,

If you try the attached target configuration does it work with the LM3S815 EVM?

Regards,

John

Hi,

Could you please capture and send out device topology information (when connected to the TUSB9260)?

Open a command shell and change dir to <CCS_INSTALL_DIR>\ccsv4\common\uscif. Now run the following command and capture the output.  

dbgjtag -d bh560usbm -p0 -rv -S pathlenth

Hi,

The output from  "dbgjtag -d bh560usbm -p0 -rv -S pathlength":

-----[Print the reset-command software log-file]-----------------------------

This utility has selected an XDS560 class product.
This utility will load the program 'bh560usbm.out'.
This utility will operate on port address '0'.
The controller does use a programmable FPGA.
The old VHDL code has a version number of '1544' (0x0608).
The new VHDL code has a version number of '1544' (0x0608).
The emulator program is named 'bh560usbm.out'.
The emulator program is version '35.34.0.2'.
The controller has a version number of '4' (0x0004).
The controller has an insertion length of '0' (0x0000).
The cable+pod has a version number of '6' (0x0006).
The cable+pod has a capability number of '8' (0x0008).
The local memory has a base address of '0' (0x000000).
The local memory has a word capacity of '32768' (0x008000).
This utility will now attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The software is configured to use all Nano-TBC VHDL features.
The controller type is the Nano-TBC VHDL.
The connection type is a 560-class revision-D multi-purpose cable.
The controller will be software reset via its configure register.
The controller will use rising-edge timing on output pins.
The controller may use rising edge timing on input pins.
The controller has a logic ONE on its EMU[0] input pin.
The controller has a logic ONE on its EMU[1] input pin.
The scan-path link-delay has been set to exactly '3' (0x0003).
The support logic has not previously detected a power-loss.

-----[Perform the standard path-length test on the JTAG IR and DR]-----------

This path-length test uses blocks of 512 32-bit words.

 || // -- \\  The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 6 bits.

The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.

Regards,

Jan-Erik

Hi John,

I'll try this tomorrow. (I'm not at my computer.)

Regards,

Jan-Erik

Hi John,

I get the same error when I use the LM3S815 configuration on the LM3S815 EVM.

The BHprobe does not detect any errors. (Log is attached)

The board data file, BHprobe and the pathlength trace are attached.

The output from  "dbgjtag -d bh560usbm -p0 -rv -S pathlength":

-----[Print the reset-command software log-file]-----------------------------

This utility has selected an XDS560 class product.
This utility will load the program 'bh560usbm.out'.
This utility will operate on port address '0'.
The controller does use a programmable FPGA.
The old VHDL code has a version number of '1544' (0x0608).
The new VHDL code has a version number of '1544' (0x0608).
The emulator program is named 'bh560usbm.out'.
The emulator program is version '35.34.0.2'.
The controller has a version number of '4' (0x0004).
The controller has an insertion length of '0' (0x0000).
The cable+pod has a version number of '6' (0x0006).
The cable+pod has a capability number of '8' (0x0008).
The local memory has a base address of '0' (0x000000).
The local memory has a word capacity of '32768' (0x008000).
This utility will now attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The software is configured to use all Nano-TBC VHDL features.
The controller type is the Nano-TBC VHDL.
The connection type is a 560-class revision-D multi-purpose cable.
The controller will be software reset via its configure register.
The controller will use rising-edge timing on output pins.
The controller may use rising edge timing on input pins.
The controller has a logic ONE on its EMU[0] input pin.
The controller has a logic ONE on its EMU[1] input pin.
The scan-path link-delay has been set to exactly '3' (0x0003).
The support logic has not previously detected a power-loss.

-----[Perform the standard path-length test on the JTAG IR and DR]-----------

This path-length test uses blocks of 512 32-bit words.

 || // -- \\  The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 6 bits.

The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.

Regards,

Jan-Erik

John,  Vikas,

I've been looking at this since Jan-Erik contacted us the other day. 

I am able to reproduce the error using our USB560m as well as a TI XDS560 PCI card with a Stellaris M3 import (used LM3S1968).  Any other 560 import on this CCS v4.1 installation (C64xp, OMAP, Cortex A8, etc.) works fine.  The error appears when I launch the debugger.  I can see it access the 560 emulator (USB activity LED), then give the error.

I also have no issues using XDS510 stellaris configurations, so this appears to be 560-related.  I updated to CCS v4.1.1.00014 before testing.  What else can we look into?

 - Andrew