Hi ：
We run OpenMP Helloworld examle on our custom TI 6678(not the EVM),and load the .exe program to core 0 and run core 0.We met some questions that after initializationand assure the DDR'S initialization correctness ( writing data to DDR'S address space according to JTAG is correct ),which namely is our user's initialization over.And then wo continue our program to the OpenMP_masterTask() function ,and step into it continue to the init_navigator function ,after which the CPU abort occurs.The CPU abort is as shown in annex init_navigator-except1.jpg
We found OpenMP_masterTask() function's source code in the openMP's installation directory (C:\ti\omp_1_01_03_02\packages\ti\omp\utils) ,and is shown in annex openMP.c.
Q1:we could not find the source code of init_navigator() function ,and did not know the operation of the init_navigator() function . How to solve the CPU abort and why?
The following is our part of project：
1）we use the TI default platform as our RTSC platform,and the RTSC cfg configuration is as follows：
mcsdk:mcsdk_2_01_02_06
xdctools:xdctools_3_24_05_48
IPC: ipc_1_24_03_32
BIOS：bios_6_33_06_50
OpenMP：omp_1_01_03_02
2） The DDR'S access space on our custom board is from 0x80000000 to 0xFFFFFFFF,totally 2GB,and does it have some questions to use the TI EVM's platform?
3) The cfg configuration file of our project is as follows:
/*
* Copyright (c) 2012, Texas Instruments Incorporated
* http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
/////////////////////////////////////////////////// （1）
var Startup = xdc.useModule('xdc.runtime.Startup');
var BIOS = xdc.useModule('ti.sysbios.BIOS');
var Task = xdc.useModule('ti.sysbios.knl.Task');
BIOS.taskEnabled = true;
Task.common$.namedInstance = true;
///////////////////////////////////////////////////（1）
// allocate out of this shared region heap after IPC has been started.
var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
// Configure HeapOMP for the shared memory heap
// HeapOMP created in ti/omp/common.cfg.xs
var HeapOMP = xdc.useModule('ti.omp.utils.HeapOMP');
HeapOMP.sharedRegionId = 2;
HeapOMP.localHeapSize = 0x20000;
HeapOMP.sharedHeapSize = 0x1000000;
// Specify the Shared Region
SharedRegion.setEntryMeta( HeapOMP.sharedRegionId,
{ base: 0x90000000,
len: HeapOMP.sharedHeapSize,
ownerProcId: 0,
cacheEnable: true,
createHeap: true,
isValid: true,
name: "heapomp",
}
);
/* load the common configuration file */
xdc.loadCapsule('ti/omp/common.cfg.xs');
var System = xdc.useModule('xdc.runtime.System');
System.extendedFormats = "%$S";
var OpenMP = xdc.useModule('ti.omp.utils.OpenMP');
OpenMP.setNumProcessors(8);
///////////////////////////////////////////////////（2）
var Memory = xdc.useModule('xdc.runtime.Memory');
Memory.defaultHeapSize = 0x40000;
Program.heap = 0x40000;
///////////////////////////////////////////////////（2）
Program.sectMap["ddr"] = new Program.SectionSpec();
Program.sectMap["ddr"].loadSegment = "DDR3";
Program.sectMap[".threadprivate"] = new Program.SectionSpec();
Program.sectMap[".threadprivate"].loadSegment = "L2SRAM";
// Enable Cache Write-back for HEAPOMP
var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
Cache.setMarMeta(0x80000000, 0x20000000, Cache.PC | Cache.WTE);
///////////////////////////////////////////////////（3）
/* Add init function */
Startup.lastFxns.$add('&C6678_init');
Program.sectMap[".ChipIntc"] = new Program.SectionSpec();
Program.sectMap[".ChipIntc"].loadSegment = "MSMCSRAM";
Program.sectMap[".CoreIntcL2Mem"] = new Program.SectionSpec();
Program.sectMap[".CoreIntcL2Mem"].loadSegment = "L2SRAM";
Program.sectMap[".cppiSharedMem"] = new Program.SectionSpec();
Program.sectMap[".cppiSharedMem"].loadSegment = "MSMCSRAM";
Program.sectMap[".csl_vect"] = new Program.SectionSpec();
Program.sectMap[".csl_vect"].loadSegment = "L2SRAM";
Program.sectMap[".qmssL2Mem"] = new Program.SectionSpec();
Program.sectMap[".qmssL2Mem"].loadSegment = "L2SRAM";
Program.sectMap[".qmssSharedMem"] = new Program.SectionSpec();
Program.sectMap[".qmssSharedMem"].loadSegment = "MSMCSRAM";
Program.sectMap[".far:taskStackSection"] = new Program.SectionSpec();
Program.sectMap[".far:taskStackSection"].loadSegment = "MSMCSRAM";
///////////////////////////////////////////////////（3）
/*
* The BIOS module will create the default heap for the system.
* Specify the size of this default heap.
*/
///////////////////////////////////////////////////（4）
/* System stack size (used by ISRs and Swis) */
Program.stack = 163840;
///////////////////////////////////////////////////（4）
/* ===================== Optional ============================= */
/* Advance User settings */
/* The default settings are commented out. */
/* Uncomment the same and modify, if different setting is desired */
/* =============================================================================*/
//OpenMP.qmssInit = true ;
//OpenMP.qmssMemRegion = -1;
//OpenMP.qmssStartIndex = 0;
//OpenMP.qmssDestQueueNum = -1;
//OpenMP.stackRegionId = -1;
//OpenMP.internalOsal = true;
//OpenMP.cppiHwSem = 3;
//OpenMP.qmssHwSem = 4;
//OpenMP.ompHwSem = 5;
//OpenMP.mpaxIndex = 3;
Compared to the TI default CFG,our cfg adds some content ,they are between the
///////////////////////////////////////////////////(i)
and
///////////////////////////////////////////////////(i)
(1) ,(2) (3) (4) are referred to our previous program ,which we use to run SYS/BIOS configuration onour custom board .Especifically,our custom board is different from the EVM,and mang cfg files needs our own driver to work completely ,and before the boot of main(),we ran to the C6678_init() function ,instead of performming the GEL file.And the C6678_init() function's mainly code is as follows:
void C6678_init()
{
if(DNUM==0)
{
//初始化PLL
if (C6678_Pll_Init(PLATFORM_PLL1_PLLM_val)!= TRUE)
{
// printf("PLL failed to initialize!!!!!!!!!!!!!!!!!!!!!!!!! \n" );
}
else
{
// printf("PLL successd to initialize\n" );
}
C6678_Power_UpDomains();
C6678_Ecc_Enable();
}
//使能TIMER
C6678_TimeCounter_Enable();
if(DNUM==0)
{
//初始化DDR
if (C6678_Ddr3_Init(PLLM_DDR3,DDR3_TYPE)!= TRUE)
{
// printf("*******DDR3 failed to initialize!******* \n" );
}
else
{
// printf("*******DDR3 successed to initialize!******* \n" );
}
}
}
C6678_init() function's mainly functions are ：
1) configure the PLL of CPU
2) initialize the DDR on the board
Thanks for your carefully reading and early reply!
