C66x ISR response speed

Kzk

Hello,

I'd like to improve a response speed on C66x ISR. My compiler version is v7.4.11(ELF). I want to program the ISR by C language. I also want to call some functions which are programed by C language in ISR. I see some load and store instructions in ISR to process the context switch. The instructions are STW and LDW. I think the ISR are improved faster if the instructions become STDW and LDDW. Could you tell me this method or something like it by compiler option?

Regards,
Kazu

over 11 years ago

0 Archaeologist over 11 years ago

TI__Guru* 84285 points

The compiler will automatically try to use STDW and LDDW when possible. Which registers are being saved?

0 Kzk over 11 years ago in reply to Archaeologist

Genius 5785 points

Hello Archaeologist,

Thank you for your reply. A[31:16,9:0] and B[31:16,9:0] registers were saved by STW/LDW in the isr_int6 function. The function calls a dummy function. The call time of the function is about 400 cycles include calling a dummy function. On the other hand the isr_int4 which is no operation is about 50 cycles. Please see attached file. You can see main.asm file in Debug folder.

Regards,
Kazu

ISR_test.zip

0 Kzk over 11 years ago in reply to Kzk

Genius 5785 points

Hello Archaeologist,

I'm sorry, but I sent you a message as other language. I edited a message above. Please check it.

Regards,
Kazu

0 Archaeologist over 11 years ago in reply to Kzk

TI__Guru* 84285 points

The compiler is saving one register at a time because you have optimization turned off. Please turn optimization on to at least level 0.

0 Kzk over 11 years ago in reply to Archaeologist

Genius 5785 points

Hello Archaeologist,

Thank you for your advice. I was able to see STDW and LDDW in ISR. I seem that it's not adding -O0~O3 option but rather removing -g option. I can even see these instructions with -Ooff option without -g option. Is my understanding correct?

Regards,
Kazu

0 Archaeologist over 11 years ago in reply to Kzk

TI__Guru* 84285 points

Yes, it is mainly the debugging information interfering with the compiler's ability to use STDW for the prolog sequence. Disabling debug information is another way to deal with the issue. However, enabling optimization is probably the better choice if the interrupt must be fast.

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C66x ISR response speed