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OMAP5432 with CCS v6.1.0: trouble writing to SDRAM

Hello All,


I recently acquired an OMAP5432 uevm and I'm having trouble writing to the SDRAM starting at 0x800 0000. I execute the following basic script (in a main.c).

	*(int *)(0x80000004) = 0x00000000;
	*(int *) 0x80000004 = 0xFFFFFFFF;
	*(int *) 0x80000004 = 0x00000000;
	*(int *) 0x80000004 = 0xAAAAAAAA;

By checking the memory browser during the debug, I observe that the memory is only partially written. For instance, the value at the adress 0x8000000 will change from 0x00000000 to 0x00FF00FF during the first two instructions. Also others adresses in the SDRAM are also modified even though nothing in my code says to.

I also run the script incremental_ddr_debug (Scripts->Memory config) and I get the following log:

CortexA15_0: GEL Output: ------------------------- 
CortexA15_0: GEL Output: >> address (0x80000000) 
CortexA15_0: GEL Output: >> value (0x00BB0000) 
CortexA15_0: GEL Output: ------------------------- 
CortexA15_0: GEL Output: >> address (0x80000004) 
CortexA15_0: GEL Output: >> value (0x00BB0001) 

.............

CortexA15_0: GEL Output: >> error index (0x00000000) 
CortexA15_0: GEL Output: >> error address (0x80000000) 
CortexA15_0: GEL Output: >> read value (0x00BB0000) 
CortexA15_0: GEL Output: >> value expected (0xAABBCC00) 
CortexA15_0: GEL Output: ------------------------- 
CortexA15_0: GEL Output: >> error index (0x00000001) 
CortexA15_0: GEL Output: >> error address (0x80000004) 
CortexA15_0: GEL Output: >> read value (0x00BB0001) 
CortexA15_0: GEL Output: >> value expected (0xAABBCC01) 
CortexA15_0: GEL Output: ------------------------- 

The MMU is disabled so the issue is not from there.

I also checked the .gel files, particularly the ddr and emif settings, but found nothing out of ordinary there.


Did you already get this issue? Might it be caused by hardware?

Best regards,

Pierre

  • Pierre,

    I apologize for the delay on this. Are you still having this issue?

    I have a pre-release OMAP5432 uEVM that I will be able to test tomorrow with the GEL files provided with CCS, but I wonder if there is something wrong with the DDR memory itself - i.e., hardware.

    Regards,
    Rafael
  • Rafael,

    I managed to "locate" the issue. The error is within the sdram initialization provided by the .gel files, particularly the emif part.
    The OMAP5432 uEVM provide 1Gb by default on reset (starting 0xC0000000). I am able to correctly write/read on this space, so the hardware in my opinion is fine.

    Regards,
    Pierre