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"Enable Semihosting" - what effect it has?

Wiktor Grodowski
Prodigy 40 points
Other Parts Discussed in Thread: TM4C1292NCPDT

Hi,

I'm working with a CCS 5.5 and notice an option "Enable semihosting (requires setting a breakpoint...)" How that is represented? I mean how the compiler/target know that this option is in use? Is the application built in some special way? Is there a commandline switch I can pass to a compiler (when compiling from cmd) that would enable semihosting? Thanks.

  • TI__Intellectual 2265 points

    Wiktor,

    There is wiki for more information on 

    Regards,

    Mandeep Deol

  • in reply to Mandeep Deol
    Prodigy 40 points
    Thank you,

    I have seen this, but it doesn't answer my question - how (if at all) does this option affect the command line of the compiler/linker? Thanks
  • in reply to Wiktor Grodowski
    TI__Intellectual 2265 points
    Wiktor,

    This option does not affect the linker/compiler. It just tells the debugger to set the semi hosting breakpoint at (SVC_Handler) and start handling semihosting calls. On the other side the target program has to be built correctly as well. The TI Compiler/linker does not have support for this. However, for some targets CCS ships with example semihosting "hello world" example projects using gcc.

    Can you provide some context as to what you are trying to do?

    Regards,
    Mandeep
  • in reply to Mandeep Deol
    Prodigy 40 points
    Hi,

    I have a situation where a program can only build when semihosting option is on. When I uncheck it, it replies with the following error:

    SEVERE: CORTEX_M4_0: Trouble Reading Register SPSR_SVC: Unsupported Register ID.
    SEVERE: CORTEX_M4_0: SemiHosting : Read Failure : Register: SPSR_SVC
    FAIL: Expected halt at symbol/address: C$$EXIT, actually halted at 0x1fcf4

    I wonder if I should do some deeper clean or what else is wrong? From what you say I get the idea, that it should work without semihosting as well? If yes, then why it fails? Thanks
  • in reply to Wiktor Grodowski
    TI__Intellectual 2265 points
    What is the build error? What device are you using? Which compiler TI/GCC?
  • in reply to Mandeep Deol
    Prodigy 40 points
    Hi,

    It's TI ARM C/C++ Compiler v5.1.x , device is a TM4C1292NCPDT MCU.

    It's actually not a build error, as all builds fine with and without semihosting, but rather execution issue, where I observe:

    START: 17:15:30 GMT+0530 (IST)

    Configuring Debug Server for specified target...
    Done
    TARGET: Stellaris In-Circuit Debug Interface
    Connecting to target...
    testEnv.outFiles: {PATH}/BoardTestsTest.out
    Loading {PATH}/BoardTestsTest.out
    Done
    Target running...
    Interrupt to abort . . .
    SEVERE: CORTEX_M4_0: Trouble Reading Register SPSR_SVC: Unsupported Register ID.

    SEVERE: CORTEX_M4_0: SemiHosting : Read Failure : Register: SPSR_SVC

    FAIL: Expected halt at symbol/address: C$$EXIT, actually halted at 0x49b3c

    END: 17:16:14 GMT+0530 (IST)


    when running after semihosting-less build... Any ideas why?
  • in reply to Wiktor Grodowski
    TI__Intellectual 2265 points

    Wiktor,

    I am still a little confused. Are you getting the semihosting errors.. even when you have disabled semihosting? What is the output.. when you have disabled semihosting?

    Mandeep