INTERNAL ERROR: Decomposition error

Something unexpected occurred while compiling.  The compiler issued this panic error message and stopped.  This is almost certainly due to a bug in the compiler.  I'd appreciate if you would send us a test case which allows us to reproduce the error.  We may also be able to give you a workaround.  Please preprocess the source file printf.c and attach that to your next post.  We also need to know what version of the TI compiler you use.

Thanks and regards,

-George

A got the some compiler message:

../Interface/UART/UART.cpp, line 130: INTERNAL ERROR: Decomposition error

for these lines:

UART_TxCount = 0;
UART_TxBufferPtr = UART_Buffer->GetTxBufferPtr();
while (*UART_TxBufferPtr++)
UART_TxCount++;

but this is working

UART_TxCount = 0;
UART_TxBufferPtr = UART_Buffer->GetTxBufferPtr();
while (UART_TxBufferPtr[UART_TxCount])
UART_TxCount++;


Dirk

Unfortunately, short code segments like this are not enough to work the issue.  We need a test case which can be compiled.  That is why we ask for a preprocessed form of the source file which contains these lines.  We also need to see the compiler version, and the build options exactly as the compiler sees them.

Thanks and regards,

-George

Hi George,

Thanks for the hint.
I attached the preprocessed source.
Regards,
Dirk

compiler output:
**** Build of configuration DebugHVT7720 for project FW_B2089P01 ****

"C:\\ti\\ccsv6\\utils\\bin\\gmake" -j 2 Interface/UART/UART.obj
'Building file: ../Interface/UART/UART.cpp'
'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/ti-cgt-msp430_15.12.1.LTS/bin/cl430" -vmsp --use_hw_mpy=none --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/ti-cgt-msp430_15.12.1.LTS/include" --include_path="C:/CCS/workspace/FW_B2089P01" --include_path="C:/CCS/workspace/FW_B2089P01/Device" --include_path="C:/CCS/workspace/FW_B2089P01/Device/I2C" --include_path="C:/CCS/workspace/FW_B2089P01/DUT" --include_path="C:/CCS/workspace/FW_B2089P01/Interface" --include_path="C:/CCS/workspace/FW_B2089P01/Interface/I2C" --include_path="C:/CCS/workspace/FW_B2089P01/Interface/UART" --include_path="C:/CCS/workspace/FW_B2089P01/Service" --include_path="C:/CCS/workspace/FW_B2089P01/Task" -g --preproc_with_compile --preproc_with_comment --define=__MSP430F2274__ --define=DEVICE_HVT7720 --silicon_errata=CPU19 --abi=eabi --obj_directory="Interface/UART" "../Interface/UART/UART.cpp"
>> ../Interface/UART/UART.cpp, line 130: INTERNAL ERROR: Decomposition error


This may be a serious problem. Please contact customer support with a
description of this problem and a sample of the source files that caused this
INTERNAL ERROR message to appear.

Cannot continue compilation - ABORTING!


>> Compilation failure
gmake: *** [Interface/UART/UART.obj] Error 1

**** Build Finished ****

source:
/*
* B1589P01_UART.cpp
*
* Created on: 30.03.2012
* Author: dirk.m
*/

/* ============================================================================ */
/* Copyright (c) 2016, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */

/********************************************************************
*
* Standard register and bit definitions for the Texas Instruments
* MSP430 microcontroller.
*
* This file supports assembler and C development for
* MSP430x22x4 devices.
*
* Texas Instruments, Version 1.5
*
* Rev. 1.0, Setup
* Rev. 1.1, Updated names for USCI
* Rev. 1.2, Added missing definitions in OA and ADC10
* Rev. 1.3 Removed bit definitions for ADC10AEx as this are in conflict with ADC10AEx Register
* Removed not existing SWCTL register definition
* Rev. 1.4, added definitions for Interrupt Vectors xxIV
* Rev. 1.5, Fixed typo in ADC10: SREF3 -> SREF2
*
********************************************************************/



extern "C" {


/*----------------------------------------------------------------------------*/
/* PERIPHERAL FILE MAP */
/*----------------------------------------------------------------------------*/

/* External references resolved by a device-specific linker command file */


/************************************************************
* STANDARD BITS
************************************************************/


/************************************************************
* STATUS REGISTER BITS
************************************************************/


/* Low Power Modes coded with Bits 4-7 in SR */


/* ============================================================================ */
/* Copyright (c) 2013, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */

/*----------------------------------------------------------------------------*/
/* INTRINSIC MAPPING FOR IAR V1.XX */
/*----------------------------------------------------------------------------*/


/*****************************************************************************/
/* INTRINSICS.H v15.12.1 */
/* */
/* Copyright (c) 2005-2016 Texas Instruments Incorporated */
/* http://www.ti.com/ */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in */
/* the documentation and/or other materials provided with the */
/* distribution. */
/* */
/* Neither the name of Texas Instruments Incorporated nor the names */
/* of its contributors may be used to endorse or promote products */
/* derived from this software without specific prior written */
/* permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */
/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */
/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */
/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */
/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */
/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */
/* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */
/* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */
/* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* */
/*****************************************************************************/

extern "C"
{

/*---------------------------------------------------------------------------*/
/* Handle legacy conflicts */
/*---------------------------------------------------------------------------*/
/*****************************************************************************/
/* INTRINSICS_LEGACY_UNDEFS.H v15.12.1 */
/* */
/* Copyright (c) 2005-2016 Texas Instruments Incorporated */
/* http://www.ti.com/ */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in */
/* the documentation and/or other materials provided with the */
/* distribution. */
/* */
/* Neither the name of Texas Instruments Incorporated nor the names */
/* of its contributors may be used to endorse or promote products */
/* derived from this software without specific prior written */
/* permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */
/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */
/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */
/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */
/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */
/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */
/* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */
/* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */
/* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* */
/*****************************************************************************/

extern "C"
{

/*---------------------------------------------------------------------------*/
/* Handle in430.h conflicts with legacy intrinsic names */
/*---------------------------------------------------------------------------*/

} /* extern "C" */


/*---------------------------------------------------------------------------*/
/* General MSP Intrinsics */
/*---------------------------------------------------------------------------*/
void __no_operation(void);

unsigned short __bic_SR_register (unsigned short mask);
unsigned short __bic_SR_register_on_exit (unsigned short mask);
unsigned short __bis_SR_register (unsigned short mask);
unsigned short __bis_SR_register_on_exit (unsigned short mask);
unsigned short __get_SR_register (void);
unsigned short __get_SR_register_on_exit (void);

unsigned short __get_SP_register(void);
void __set_SP_register(unsigned short value);

void __delay_cycles(unsigned long cycles);

unsigned int __even_in_range(unsigned int val, unsigned int range);

void __op_code(unsigned short op);

/*---------------------------------------------------------------------------*/
/* General MSP Macros */
/*---------------------------------------------------------------------------*/


/*---------------------------------------------------------------------------*/
/* MSP430/430X Intrinsics */
/*---------------------------------------------------------------------------*/
void __disable_interrupt(void);
void __enable_interrupt(void);
void __set_interrupt_state(unsigned short state);

unsigned short __get_R4_register(void);
void __set_R4_register(unsigned short value);
unsigned short __get_R5_register(void);
void __set_R5_register(unsigned short value);

unsigned short __bcd_add_short(unsigned short, unsigned short);
unsigned long __bcd_add_long(unsigned long, unsigned long);

/*---------------------------------------------------------------------------*/
/* MSP430/430X Macros */
/*---------------------------------------------------------------------------*/




/*---------------------------------------------------------------------------*/
/* Legacy Macros */
/*---------------------------------------------------------------------------*/

} /* extern "C" */



/************************************************************
* PERIPHERAL FILE MAP
************************************************************/

/************************************************************
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
************************************************************/

extern volatile unsigned char IE1; /* Interrupt Enable 1 */

extern volatile unsigned char IFG1; /* Interrupt Flag 1 */

extern volatile unsigned char IE2; /* Interrupt Enable 2 */

extern volatile unsigned char IFG2; /* Interrupt Flag 2 */

/************************************************************
* ADC10
************************************************************/

extern volatile unsigned char ADC10DTC0; /* ADC10 Data Transfer Control 0 */
extern volatile unsigned char ADC10DTC1; /* ADC10 Data Transfer Control 1 */
extern volatile unsigned char ADC10AE0; /* ADC10 Analog Enable 0 */
extern volatile unsigned char ADC10AE1; /* ADC10 Analog Enable 1 */

extern volatile unsigned int ADC10CTL0; /* ADC10 Control 0 */
extern volatile unsigned int ADC10CTL1; /* ADC10 Control 1 */
extern volatile unsigned int ADC10MEM; /* ADC10 Memory */
extern volatile unsigned int ADC10SA; /* ADC10 Data Transfer Start Address */

/* ADC10CTL0 */


/* ADC10CTL1 */






/* ADC10DTC0 */

/************************************************************
* Basic Clock Module
************************************************************/

extern volatile unsigned char DCOCTL; /* DCO Clock Frequency Control */
extern volatile unsigned char BCSCTL1; /* Basic Clock System Control 1 */
extern volatile unsigned char BCSCTL2; /* Basic Clock System Control 2 */
extern volatile unsigned char BCSCTL3; /* Basic Clock System Control 3 */












/*************************************************************
* Flash Memory
*************************************************************/

extern volatile unsigned int FCTL1; /* FLASH Control 1 */
extern volatile unsigned int FCTL2; /* FLASH Control 2 */
extern volatile unsigned int FCTL3; /* FLASH Control 3 */






/************************************************************
* Operational Amplifier
************************************************************/

extern volatile unsigned char OA0CTL0; /* OA0 Control register 0 */
extern volatile unsigned char OA0CTL1; /* OA0 Control register 1 */
extern volatile unsigned char OA1CTL0; /* OA1 Control register 0 */
extern volatile unsigned char OA1CTL1; /* OA1 Control register 1 */



//#define OACAL (0x02) /* OAx Offset Calibration */


/************************************************************
* DIGITAL I/O Port1/2 Pull up / Pull down Resistors
************************************************************/

extern volatile unsigned char P1IN; /* Port 1 Input */
extern volatile unsigned char P1OUT; /* Port 1 Output */
extern volatile unsigned char P1DIR; /* Port 1 Direction */
extern volatile unsigned char P1IFG; /* Port 1 Interrupt Flag */
extern volatile unsigned char P1IES; /* Port 1 Interrupt Edge Select */
extern volatile unsigned char P1IE; /* Port 1 Interrupt Enable */
extern volatile unsigned char P1SEL; /* Port 1 Selection */
extern volatile unsigned char P1REN; /* Port 1 Resistor Enable */

extern volatile unsigned char P2IN; /* Port 2 Input */
extern volatile unsigned char P2OUT; /* Port 2 Output */
extern volatile unsigned char P2DIR; /* Port 2 Direction */
extern volatile unsigned char P2IFG; /* Port 2 Interrupt Flag */
extern volatile unsigned char P2IES; /* Port 2 Interrupt Edge Select */
extern volatile unsigned char P2IE; /* Port 2 Interrupt Enable */
extern volatile unsigned char P2SEL; /* Port 2 Selection */
extern volatile unsigned char P2REN; /* Port 2 Resistor Enable */

/************************************************************
* DIGITAL I/O Port3/4 Pull up / Pull down Resistors
************************************************************/

extern volatile unsigned char P3IN; /* Port 3 Input */
extern volatile unsigned char P3OUT; /* Port 3 Output */
extern volatile unsigned char P3DIR; /* Port 3 Direction */
extern volatile unsigned char P3SEL; /* Port 3 Selection */
extern volatile unsigned char P3REN; /* Port 3 Resistor Enable */

extern volatile unsigned char P4IN; /* Port 4 Input */
extern volatile unsigned char P4OUT; /* Port 4 Output */
extern volatile unsigned char P4DIR; /* Port 4 Direction */
extern volatile unsigned char P4SEL; /* Port 4 Selection */
extern volatile unsigned char P4REN; /* Port 4 Resistor Enable */

/************************************************************
* Timer A3
************************************************************/

extern volatile unsigned int TAIV; /* Timer A Interrupt Vector Word */
extern volatile unsigned int TACTL; /* Timer A Control */
extern volatile unsigned int TACCTL0; /* Timer A Capture/Compare Control 0 */
extern volatile unsigned int TACCTL1; /* Timer A Capture/Compare Control 1 */
extern volatile unsigned int TACCTL2; /* Timer A Capture/Compare Control 2 */
extern volatile unsigned int TAR; /* Timer A Counter Register */
extern volatile unsigned int TACCR0; /* Timer A Capture/Compare 0 */
extern volatile unsigned int TACCR1; /* Timer A Capture/Compare 1 */
extern volatile unsigned int TACCR2; /* Timer A Capture/Compare 2 */

/* Alternate register names */
/* Alternate register names - 5xx style */





/* TA3IV Definitions */

/* Alternate register names - 5xx style */

/************************************************************
* Timer B3
************************************************************/

extern volatile unsigned int TBIV; /* Timer B Interrupt Vector Word */
extern volatile unsigned int TBCTL; /* Timer B Control */
extern volatile unsigned int TBCCTL0; /* Timer B Capture/Compare Control 0 */
extern volatile unsigned int TBCCTL1; /* Timer B Capture/Compare Control 1 */
extern volatile unsigned int TBCCTL2; /* Timer B Capture/Compare Control 2 */
extern volatile unsigned int TBR; /* Timer B Counter Register */
extern volatile unsigned int TBCCR0; /* Timer B Capture/Compare 0 */
extern volatile unsigned int TBCCR1; /* Timer B Capture/Compare 1 */
extern volatile unsigned int TBCCR2; /* Timer B Capture/Compare 2 */

/* Alternate register names - 5xx style */




/* Additional Timer B Control Register bits are defined in Timer A */





/* TB3IV Definitions */

/* Alternate register names - 5xx style */

/************************************************************
* USCI
************************************************************/

extern volatile unsigned char UCA0CTL0; /* USCI A0 Control Register 0 */
extern volatile unsigned char UCA0CTL1; /* USCI A0 Control Register 1 */
extern volatile unsigned char UCA0BR0; /* USCI A0 Baud Rate 0 */
extern volatile unsigned char UCA0BR1; /* USCI A0 Baud Rate 1 */
extern volatile unsigned char UCA0MCTL; /* USCI A0 Modulation Control */
extern volatile unsigned char UCA0STAT; /* USCI A0 Status Register */
extern volatile unsigned char UCA0RXBUF; /* USCI A0 Receive Buffer */
extern volatile unsigned char UCA0TXBUF; /* USCI A0 Transmit Buffer */
extern volatile unsigned char UCA0ABCTL; /* USCI A0 LIN Control */
extern volatile unsigned char UCA0IRTCTL; /* USCI A0 IrDA Transmit Control */
extern volatile unsigned char UCA0IRRCTL; /* USCI A0 IrDA Receive Control */



extern volatile unsigned char UCB0CTL0; /* USCI B0 Control Register 0 */
extern volatile unsigned char UCB0CTL1; /* USCI B0 Control Register 1 */
extern volatile unsigned char UCB0BR0; /* USCI B0 Baud Rate 0 */
extern volatile unsigned char UCB0BR1; /* USCI B0 Baud Rate 1 */
extern volatile unsigned char UCB0I2CIE; /* USCI B0 I2C Interrupt Enable Register */
extern volatile unsigned char UCB0STAT; /* USCI B0 Status Register */
extern volatile unsigned char UCB0RXBUF; /* USCI B0 Receive Buffer */
extern volatile unsigned char UCB0TXBUF; /* USCI B0 Transmit Buffer */
extern volatile unsigned int UCB0I2COA; /* USCI B0 I2C Own Address */
extern volatile unsigned int UCB0I2CSA; /* USCI B0 I2C Slave Address */

// UART-Mode Bits

// SPI-Mode Bits

// I2C-Mode Bits
//#define res (0x10) /* reserved */

// UART-Mode Bits

// SPI-Mode Bits
//#define res (0x20) /* reserved */
//#define res (0x10) /* reserved */
//#define res (0x08) /* reserved */
//#define res (0x04) /* reserved */
//#define res (0x02) /* reserved */

// I2C-Mode Bits
//#define res (0x20) /* reserved */





//#define res (0x80) /* reserved */
//#define res (0x40) /* reserved */
//#define res (0x20) /* reserved */
//#define res (0x10) /* reserved */




//#define res (0x80) /* reserved */
//#define res (0x40) /* reserved */
//#define res (0x02) /* reserved */



/************************************************************
* WATCHDOG TIMER
************************************************************/

extern volatile unsigned int WDTCTL; /* Watchdog Timer Control */
/* The bit names have been prefixed with "WDT" */


/* WDT-interval times [1ms] coded with Bits 0-2 */
/* WDT is clocked by fSMCLK (assumed 1MHz) */
/* WDT is clocked by fACLK (assumed 32KHz) */
/* Watchdog mode -> reset after expired time */
/* WDT is clocked by fSMCLK (assumed 1MHz) */
/* WDT is clocked by fACLK (assumed 32KHz) */

/* INTERRUPT CONTROL */
/* These two bits are defined in the Special Function Registers */
/* #define WDTIE 0x01 */
/* #define WDTIFG 0x01 */

/************************************************************
* Calibration Data in Info Mem
************************************************************/


extern volatile unsigned char CALDCO_16MHZ; /* DCOCTL Calibration Data for 16MHz */
extern volatile unsigned char CALBC1_16MHZ; /* BCSCTL1 Calibration Data for 16MHz */
extern volatile unsigned char CALDCO_12MHZ; /* DCOCTL Calibration Data for 12MHz */
extern volatile unsigned char CALBC1_12MHZ; /* BCSCTL1 Calibration Data for 12MHz */
extern volatile unsigned char CALDCO_8MHZ; /* DCOCTL Calibration Data for 8MHz */
extern volatile unsigned char CALBC1_8MHZ; /* BCSCTL1 Calibration Data for 8MHz */
extern volatile unsigned char CALDCO_1MHZ; /* DCOCTL Calibration Data for 1MHz */
extern volatile unsigned char CALBC1_1MHZ; /* BCSCTL1 Calibration Data for 1MHz */


/************************************************************
* Interrupt Vectors (offset from 0xFFE0)
************************************************************/



/************************************************************
* End of Modules
************************************************************/

}


/*
* HV_Defines.h
*
* Created on: 27.06.2013
* Author: Markus.p
*/


//Relay Defines











//LED-Defines for Relay LED's










//LED-Defines for Status-LED's




// PORT 1



// PORT 2
//#define HV_PROCESSING (0x02)

//#define Empty (0x80)


// PORT 3



// PORT 4

//#define empty (0x20)
//#define empty (0x40)


/*
* B1589P01_UART_BUFFER.h
*
* Created on: 04.06.2012
* Author: dirk.m
*/


class UART_BUFFER
{
public:
UART_BUFFER(unsigned char, unsigned char);
UART_BUFFER(unsigned char, char *, unsigned char);
virtual ~UART_BUFFER();
char *GetTxBufferPtr(void) const;
char *GetRxBufferPtr(void) const;
void Copy2Buffer(const char *);
void ResetBuffer(void);
void PushToBuffer(unsigned char);

unsigned char TxMaxBufferSize;
unsigned char RxMaxBufferSize;

private:
char *TxBufferPtr;
char *RxBufferPtr;
unsigned char TxCount;
bool RxBufferIntern;
};

/*
* B1589P01_UART.h
*
* Created on: 30.03.2012
* Author: dirk.m
*/


/*****************************************************************************/
/* STDINT.H v15.12.1 */
/* */
/* Copyright (c) 2002-2016 Texas Instruments Incorporated */
/* http://www.ti.com/ */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in */
/* the documentation and/or other materials provided with the */
/* distribution. */
/* */
/* Neither the name of Texas Instruments Incorporated nor the names */
/* of its contributors may be used to endorse or promote products */
/* derived from this software without specific prior written */
/* permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */
/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */
/* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */
/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */
/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */
/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */
/* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */
/* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */
/* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* */
/*****************************************************************************/

/* 7.18.1.1 Exact-width integer types */

typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef int int16_t;
typedef unsigned int uint16_t;
typedef long int32_t;
typedef unsigned long uint32_t;


typedef long long int64_t;
typedef unsigned long long uint64_t;

/* 7.18.1.2 Minimum-width integer types */

typedef int8_t int_least8_t;
typedef uint8_t uint_least8_t;

typedef int16_t int_least16_t;
typedef uint16_t uint_least16_t;
typedef int32_t int_least32_t;
typedef uint32_t uint_least32_t;


typedef int64_t int_least64_t;
typedef uint64_t uint_least64_t;

/* 7.18.1.3 Fastest minimum-width integer types */

typedef int16_t int_fast8_t;
typedef uint16_t uint_fast8_t;
typedef int16_t int_fast16_t;
typedef uint16_t uint_fast16_t;

typedef int32_t int_fast32_t;
typedef uint32_t uint_fast32_t;


typedef int64_t int_fast64_t;
typedef uint64_t uint_fast64_t;

/* 7.18.1.4 Integer types capable of holding object pointers */
typedef int intptr_t;
typedef unsigned int uintptr_t;

/* 7.18.1.5 Greatest-width integer types */
typedef long long intmax_t;
typedef unsigned long long uintmax_t;

/*
According to footnotes in the 1999 C standard, "C++ implementations
should define these macros only when __STDC_LIMIT_MACROS is defined
before <stdint.h> is included."
*/


/*!
* @brief UARTUSCIA Baudrate configuration
*
* This structure is used to specifiy the usci controller's clock divider
* settings to achieve the desired baudrate given the indicated clock input
* frequency.
* Divider values can be determined by referring to the MSP430 baudrate
* calculator.
* software-dl.ti.com/.../index.html
*
* A sample structure is shown below:
* @code
* const UARTUSCIA_BaudrateConfig uartUSCIABaudrates[] = {
* // Baudrate, input clock (Hz), Prescalar, UCBRFx, UCBRSx, Oversampling
* {115200, 8192000, 4, 7, 0, 1},
* {9600, 8192000, 53, 5, 0, 1},
* {9600, 32768, 3, 0, 3, 0},
* };
* @endcode
*/
typedef struct UARTUSCIA_BaudrateConfig {
uint32_t outputBaudrate; /*! Search criteria: desired baudrate */
uint32_t inputClockFreq; /*! Search criteria: given this input clock frequency */

uint8_t prescalar; /*! Clock prescalar */
uint8_t hwRegUCBRFx; /*! UCBRFx lookup entry */
uint8_t hwRegUCBRSx; /*! UCBRSx lookup entry */
uint8_t sampling; /*! Oversampling mode (1: True; 0: False) */
} UARTUSCIA_BaudrateConfig;



//enum UART_STATUS_FLAG { UART_STATSU_NACK };
enum UART_DELIMITER_SET {
UART_DELIMITER_SET_OFF = 0, UART_DELIMITER_SET_ON
};

//class UART : public TASK
class UART {
struct UART_STATUS_FLAG {
unsigned char Timeout :1;
};

union UART_STATUS {
UART_STATUS_FLAG Flag;
unsigned char allFlags;
};

enum UART_OPERATION_STATUS {
IDLE = 0, INITiate, WRITE_READ, OPComplete
};

public:
enum UART_PORT {
UART_HV, UART_PC
};

enum UART_Mode {
UART_MODE_BLOCKING,
UART_MODE_CALLBACK
};

enum UART_ReturnMode {
UART_RETURN_FULL,
UART_RETURN_NEWLINE
};

enum UART_DataMode {
UART_DATA_BINARY, UART_DATA_TEXT
};

struct UART_Params {
UART_Mode readMode;
UART_Mode writeMode;
unsigned int readTimeout;
unsigned int writeTimeout;
UART_ReturnMode readReturnMode;
UART_DataMode readDataMode;
UART_DataMode writeDataMode;
unsigned int baudRate;
};

UART();
virtual ~UART();

unsigned char RTxData(UART_BUFFER *, UART_PORT);
void Delimiter(char, UART_DELIMITER_SET);

private:
UART_OPERATION_STATUS OPSreg;
UART_STATUS UART_Status;

UART_OPERATION_STATUS ReadWriteData(UART_BUFFER *, UART_PORT);
void Init(void);
};


void TA_SetDelay(unsigned int);
extern volatile unsigned int TA_DelayCounter;
volatile unsigned char UART_TxCount, UART_RxCount;
volatile char *UART_TxBufferPtr, *UART_RxBufferPtr, UART_Delimiter;
volatile unsigned char UART_ISR_Status;
bool BaudRate38400 = false;

UART::UART() :
OPSreg(IDLE) {
UART_Status.allFlags = 0;
Init();
}

UART::~UART() {

}

void UART::Init(void) {
UART_TxCount = 0;
UART_RxCount = 0;

// Clear UART status
UART_ISR_Status = 0;

// Init all usci
UCA0CTL1 = (0x80) + (0x01); // SMCLK
// Erroneous characters rejected and UCRXIFG is not set
// Received break characters do not set UCRXIFG
// Not dormant. All received characters set UCRXIFG
// Next frame transmitted is data
// Next frame transmitted is not a break
// Enabled. USCI logic held in reset state

UCA0CTL0 = 0; // Parity disable
// Odd parity
// LSB first
// One stop bit
// UART mode
// Asynchronous mode

UCA0BR0 = 6; // 9600 baud at 1 mhz smclk
UCA0BR1 = 0;
UCA0MCTL = (0x00) + (0x80) + (0x01);

UCA0CTL1 &= ~(0x01); // Disabled. USCI reset released for operation

// Enable RX, TX interrupts
IE2 |= (0x02) + (0x01);
}

unsigned char UART::RTxData(UART_BUFFER *UART_Buffer, UART_PORT UART_Port) {

while (ReadWriteData(UART_Buffer, UART_Port))
;
return UART_Status.allFlags;
}
/**
* ReadWriteData transmite and receive data over the RS232 ports
* @param UART_Buffer Pointer to the UART_Buffer
* @param UART_Port Port to use for transmission
* @return Status Status of transmission
*/
UART::UART_OPERATION_STATUS UART::ReadWriteData(UART_BUFFER *UART_Buffer,
UART_PORT UART_Port) {

switch (OPSreg) {
case IDLE:
OPSreg = INITiate;
break;
case INITiate:
UART_Status.Flag.Timeout = false;

// Set UART port
// UART port 1 - HVT7720
// UART port 2 - PC
// COM driver off
// FORCEOFF_INV = 0
// EN_INV = 1
// COM driver on
// FORCEOFF_INV = 1
// EN_INV = 0
switch (UART_Port) {
case UART_HV:
P2OUT |= (0x04) + (0x40);
P2OUT &= ~((0x08) + (0x20));
break;
case UART_PC:
P2OUT &= ~((0x04) + (0x40));
P2OUT |= (0x08) + (0x20);
break;
}

// Init uart isr variables
// Count additional chars in text mode
//UART_TxCount = UART_Buffer->TxCount;
UART_TxCount = 0;
UART_TxBufferPtr = UART_Buffer->GetTxBufferPtr();
// while (UART_TxBufferPtr[UART_TxCount])
// UART_TxCount++;
while (*UART_TxBufferPtr++)
UART_TxCount++;
UART_RxCount = UART_Buffer->RxMaxBufferSize;
//UART_TxBufferPtr = UART_Buffer->GetTxBufferPtr();
UART_RxBufferPtr = UART_Buffer->GetRxBufferPtr();

// Set status uart busy
if (UART_TxCount)
UART_ISR_Status |= 0x02;
if (UART_RxCount)
UART_ISR_Status |= 0x04;

UART_ISR_Status &= ~0x40;

// Start transmission with set flag
IFG2 |= (0x02);

TA_SetDelay(
(UART_Buffer->TxMaxBufferSize + UART_Buffer->RxMaxBufferSize
+ 40) * 10);
OPSreg = WRITE_READ;
break;
case WRITE_READ:
// Wait of end of transmission
if (!(UART_ISR_Status
& (0x02 + 0x04))
|| !TA_DelayCounter)
OPSreg = OPComplete;
break;
case OPComplete:
if (UART_ISR_Status
& (0x02 + 0x04)) {
// Timeout failure
UART_ISR_Status |= 0x40;
UART_RxCount = 0;
UART_Status.Flag.Timeout = true;
}
// COM driver off
//P2OUT |= RS232_1_EN + RS232_2_EN;
//P2OUT &= ~(RS232_1_FOFF + RS232_2_FOFF);

OPSreg = IDLE;
}
// Transmission ok
return OPSreg;;
}

/**
* Set the tramission/receiving delimiter
* @param delimiter Delimiter character
* @param SetDelimiter Using delimiter true/false
*/
void UART::Delimiter(char delimiter, UART_DELIMITER_SET SetDelimiter) {
switch (SetDelimiter) {
case UART_DELIMITER_SET_OFF:
UART_ISR_Status &= ~0x10;
break;
case UART_DELIMITER_SET_ON:
UART_Delimiter = delimiter;
UART_ISR_Status = 0x10;
break;
}
}

Thank you for submitting a test case.  I can reproduce the same results.  I filed SDSCM00052805 in the SDOWP system to have this investigated.  Feel free to follow it with the SDOWP link below in my signature.

Thanks and regards,

-George