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16 bit saturated shift and multiply operations for C66xx

Hi,

We are currently working on EVS speech codec supporting only C66xx (no C64x or C64x+ backwards compatibility). We are using the following  intrinsics to optimize 16-bit saturated shift and multiply operations:

#define shl(a,b) ((b) < 0 ? (a) >> (–b) : (_sshl((a),(b+16))>>16))
#define shr(a,b) ((b) < 0 ? (_sshl((a),(–b+16))>>16) : ((a) >> (b)))
#define mult(a,b) (_smpy((a), (b)) >> 16)

Are there faster methods for c66x ?  For example saturated 16-bit adds/subs are supported by _sadd2/_ssub2, but there does not seem to be equivalents for 16-bit saturated shifts and multiplies.

Note: We have looked through the following TI documents to obtain the above mentioned intrinsics

www.ti.com/.../spra617a.pdf
www.ti.com/.../spru187u.pdf

-- 
Thanks!

Regards,
Sarvani Chadalapaka
HPC Systems Engineer
Signalogic Inc.
  • All of the intrinsics supported by the compiler are listed in the section titled Using Intrinsics to Access Assembly Language Statements in the C6x compiler manual.  The spru187u link you show above is an older version of the compiler manual.  Though this section on the intrinsics is probably the same.  Another place to check is the C66x CPU manual.  Many of the unusual instructions in the CPU manual have an intrinsic in the compiler.  I looked through both of those manuals, and I couldn't find any 16-bit shift with saturation operations.  But I think you should look anyway.  I might have missed something.

    Thanks and regards,

    -George

  • George,

    Thank you for your response. We have previously looked through available TI documentation and also the links that you sent and have not found anything better or faster than the original intrinsics going back to c62x generation. Since C66xx is considerably more advanced, we were hoping that this is something that we might have missed.

    --
    Thanks!

    Regards,
    Sarvani Chadalapaka
    HPC Systems Engineer
    Signalogic Inc.