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TMS320F28075 not running after power cycle

Other Parts Discussed in Thread: TMS320F28075, CONTROLSUITE, TMS320F28069

I am having a strange issue on a new project using the TMS320F28075 (100 pin package).  I have a build of code which runs fine immediately after loading from Code Composer (6.1.1).  Part of the code periodically toggles an LED so that I know the processor is running.  However, after power cycling the board, the LED does not toggle.  Doing a few tests I was able to determine that the processor was never getting to main().  Additionally, I have noticed that the code will not execute after initiating a CPU reset from CCS Debug.  

I also have an experimenter's kit with the TMX320F28075 (176 pin package) on which I have loaded the exact same build of code.  Interestingly, the GPIO will toggle after power cycling the experimenters kit, indicating that the processor does run after a power cycle.  

I have checked /TRST, /RST, the oscillator, and all the typical hardware issues one would suspect from this problem, but everything looked OK.  I want to know if there is anything else I should look into to resolve this problem.  I know the packages are different between my board and the experimenter's kit (in addition to the experimenter's kit having a TMX), but I am not aware of any reason why the experimenter's kit would function normally while my board does not.  I have posted my .cmd file below just in case, and the "F2807x_CodeStartBranch.asm" has not been modified from ControlSuite v190.  Any help would be appreciated.

MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */

BEGIN : origin = 0x080000, length = 0x000002

RAMLS : origin = 0x008000, length = 0x002800
//RAMLS0 : origin = 0x008000, length = 0x000800
//RAMLS1 : origin = 0x008800, length = 0x000800
//RAMLS2 : origin = 0x009000, length = 0x000800
//RAMLS3 : origin = 0x009800, length = 0x000800
//RAMLS4 : origin = 0x00A000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002

/* Flash sectors */

PROG : origin = 0x080002, length = 0x005FFE /* Program code - unified flash A,B,C */
//FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
//FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
//FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD0 : origin = 0x00B000, length = 0x000800
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS5 : origin = 0x00A800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000


FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
}


SECTIONS
{
/* Allocate program areas: */
.cinit : > PROG PAGE = 0, ALIGN(4)
.pinit : > PROG, PAGE = 0, ALIGN(4)
.text : >> PROG PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)
ramfuncs : LOAD = PROG,
RUN = RAMLS,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)

/* Allocate uninitalized data sections: */
.stack : > RAMM1 | RAMM0 PAGE = 1
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1 PAGE = 1
.esysmem : > RAMLS5 PAGE = 1

/* Initalized sections go in Flash */
.econst : >> PROG PAGE = 0, ALIGN(4)
.switch : > PROG PAGE = 0, ALIGN(4)

.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1

/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333

}

 

  • Hello Benjamin,

    Benjamin Paik said:
    However, after power cycling the board, the LED does not toggle.

    Is this with a CCS debug session? Or are you running without the debugger?

    Thanks

    ki

  • The processor does not seem to boot for power cycles without a JTAG connection.  Also, doing a CPU Reset inside of a CCS debug session produces the same  result - the processor will not boot.

  • If you do a CPU restart after the reset, does it still not work?
  • I just figured out the issue had to do with leaving the boot pins (GPIO 84 and GPIO 72) disconnected.  I had one of our techs add pull-up resistors from the boot pins to the 3.3V supply and the device now boots properly.  I'm still a little confused because I thought the internal pull-ups would default the boot mode to boot from flash.  On the TMS320F28069 which I have used on a previous project, I left the boot pins disconnected and the device would boot from flash.  Obviously, this is not the case for the TMS320F28075.