I am using the dm6435 and switching the allocation of L1D memory between 100% cache (48k SRAM, 32k cache) and 100% SRAM (80k SRAM, no cache). I want to split this memory region into 3 pieces: 1) a small piece of the memory that is always sram where I will allocate the .bss & .stack sections, a2) piece that is the remaining section of the 48k SRAM , and 3) a piece that is the remaining section of the 80k SRAM. The last 2 pieces overlay each other. Then I want to declare a data overlay using one of these last 2 sections, i.e. modules A & B both reuse the same section of piece 2, and modules C & D reuse the same section of piece 3. How would I go about this organization in the linker command files? I'm fine with the application being responsible for knowing which cache configuration it is using for which module.
Thanks for any insight.