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Mixing Adaptive Clocking and Non-Adaptive Clocking Devices in Scan Chain

The hardware engineer can manually configure the JTAG chain on our board, using zero ohm resistors, so that only the three 6467 devices are in the chain.  I setup a target config and I was able to connect to each of the three 6467s, one at a time.

Then he configured the board so that the three 6467s, PROM, and FPGA are all in the chain (similar to the series topology shown in http://processors.wiki.ti.com/index.php/Adaptive_Clocking, except the last two devices don't have RTCK output so the RTCK from last 6467 goes back to JTAG connector).  The SdConfigEx tool gives an error when I do Emulator->Test, so there is something wrong with the chain.  So, he disconnected RTCK output of the last 6467 from TCK the input of the PROM (6467 RTCK output still connects to the RTCK of the JTAG connector).  And connected TCK from the JTAG connector directly to the PROM.  Then, the SdConfigEx is successful and says there are 5 devices with an IR of 44, which is correct.  However, when I create a 5 device target config and try to connect to the first 6467, I get "Unable to determine target endian mode" (error 0x80000240/-1159).

It is not clear how to connect the RTCK signal if the last two devices do not have RTCK output.  Are we even allowed to mix adaptive clocking and non-adaptive clocking devices in the same chain?

  • There are addtional instructions for mixing devices with and witrhout RTCK pins on a single JTAG scan path at:

    http://processors.wiki.ti.com/index.php/XDS_Target_Connection_Guide#Multi-device_Adaptive_Clocking

     

     

     

  • After a conversation with Brad Griffis this morning he informed me that you are already following the topology recommendation from the Target Connection Guide link I provided in the last post. . If this is the case we would like you to try a couple of things to help determine where the problem is:

    You should be able to try the following by setting your TCK rate to less than 1/8 of the functional clock rate of the slowest ARM core in the scan chain. If you are using an XDS that supports adaptive clocking please disable the adaptive clocking mode, or if you are using an XDS that does not have native support for adaptive clocking and you are using an adapter, please remove the adapter. Also note that it's common for the ARM core's functional clock rate to be changed at boot time.

    1. )  Isolate the TI devices from the non TI devices to determine if the non-TI devices are causing a problem. Reduce the TCK rate until the TI devices are recognized by the SD Tool.

    2.) If step 1 works then add one non-TI device at a time. I am suspecting one of these may be sensitive to the RTCK clock gating (TCK is re-timed to the functional clock rate of the ARM core and exported by RTCK). When you add a device, and it fails, you may try reducing TCK.

    3.) If you can not find a TCK rate that works with the non-TI devices you may have to put these on a separate scan chain.