Moving prolog and epilog to RAM

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/*
 *  ======== TMS320F2812.cmd ========
 *  Define the memory block start/length for the F2812
 *
 *! Revision History
 *! ================
 *! 26-May-2011 jv  created to support c28 generic platform.
 */

/*  
 *  PAGE 0 will be used to organize program sections
 *  PAGE 1 will be used to organize data sections
 *
 *  Notes: 
 *      Memory blocks on F2812 are uniform (ie same
 *      physical memory) in both PAGE 0 and PAGE 1.  
 *      That is the same memory region should not be
 *      defined for both PAGE 0 and PAGE 1.
 *      Doing so will result in corruption of program 
 *      and/or data. 
 */

MEMORY
{
PAGE 0:    /* Program Memory */

    OTP         : origin = 0x3D7800, length = 0x000800     /* on-chip OTP */
    FLASH       : origin = 0x3D8000, length = 0x01FF80     /* on-chip FLASH */
    CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Program with all 0x0000 when CSM is in use. */
    BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Used for "boot to Flash" bootloader mode. */
    CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* CSM password locations in FLASH */
    H0SARAM     : origin = 0x3F8000, length = 0x002000     /* on-chip RAM block H0 */
   	//ZONE2       : origin = 0x080000, length = 0x020000     /* XINTF zone 2 */
   	ZONE6       : origin = 0x100000, length = 0x080000     /* XINTF zone 6 */

    ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM available if MP/MCn=0 */
    RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */
    VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */

PAGE 1 :   /* Data Memory */
   	PIEVECT     : origin = 0x000D00, length = 0x000100
    M01SARAM    : origin = 0x000000, length = 0x000800     /* on-chip RAM block M0, M1 */
    L01SARAM    : origin = 0x008000, length = 0x002000     /* on-chip RAM block L0, L1 */
 	DRAME0     	: origin = 0x080000, length = 0x040000 		// External Data RAM
}

/* 
 *  Allocate sections to memory blocks.
 *  Note:
 *      codestart   user defined section in DSP28_CodeStartBranch.asm
 *                  used to redirect code execution when booting to flash
 *
 *      ramfuncs    user defined section to store functions that will be
 *                  copied from Flash into RAM
 */ 
 
SECTIONS
{

    /* Allocate program areas: */
    .cinit              : > FLASH       PAGE = 0
    .pinit              : > FLASH       PAGE = 0
    .text               : > FLASH       PAGE = 0
    codestart           : > BEGIN       PAGE = 0
  	fastcode { *(ramfuncs)

  		  -l = rts2800_ml.lib<epilog.obj>(.text)
  		  -l = rts2800_ml.lib<prolog.obj>(.text)
							}
		  				  LOAD = FLASH,
                          RUN  = H0SARAM,
                          LOAD_START(_RamfuncsLoadStart),
                          LOAD_END(_RamfuncsLoadEnd),
                          RUN_START(_RamfuncsRunStart),
                          PAGE = 0

   Flash28_API:
   {
        -l ..\Libs\Flash2812_API_V210.lib(.econst)
        -l ..\Libs\Flash2812_API_V210.lib(.text)
   }                   LOAD = FLASH,
                       RUN = H0SARAM,
                       LOAD_START(_Flash28_API_LoadStart),
                       LOAD_END(_Flash28_API_LoadEnd),
                       RUN_START(_Flash28_API_RunStart),
                       PAGE = 0

    csmpasswds          : > CSM_PWL     PAGE = 0
    csm_rsvd            : > CSM_RSVD    PAGE = 0

    /* Allocate uninitalized data sections: */
    .stack              : > M01SARAM			    		PAGE = 1
    .cio                : > DRAME0     						PAGE = 1
    .ebss               : > L01SARAM | M01SARAM | DRAME0	PAGE = 1
    .esysmem            : > L01SARAM | M01SARAM     		PAGE = 1

    /* Initalized sections go in Flash */
    /* For SDFlash to program these, they must be allocated to page 0 */
    .econst             : > FLASH       PAGE = 0
    .switch             : > FLASH       PAGE = 0

    /* Allocate IQ math areas: */
    IQmath              : > FLASH       PAGE = 0                  /* Math Code */
    IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

    .LoggerBufSection 	: > DRAME0 						PAGE = 1
   .taskStackSection 	: > L01SARAM 					PAGE = 1

   IntRam			: > M01SARAM | L01SARAM,   PAGE = 1
   ExtRam			: > DRAME0, 	PAGE = 1

   fir_volt_db align(0x100)		> M01SARAM,   PAGE = 1
   fir_volt				 	  : > M01SARAM,   PAGE = 1
   fir_volt_coeff align(0x100)  > L01SARAM,   PAGE = 1
   fir_curr_db align(0x100)		> M01SARAM,   PAGE = 1
   fir_curr 			 	  : > M01SARAM,   PAGE = 1

   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT
}