Other Parts Discussed in Thread: MSP430F5418,
Tool/software: Code Composer Studio
Hello,
I am using CCS v6.2 and v1_00_12_00 of MSP430 Custom BSL to create my own bootloader to fit my communication needs. I modified MSP430F5418 example project to MSP430F5529, that also included some changes to linker file. However when I builded project I noticed, that sections created in BSL430_LOW_LEVEL_INIT.asm file doesn't appear in generated TI-HEX file nor are listed during linking. Espescially the ".ZAREA" section is missing which I planned to use for "jumping" into Bootloader.
Linker creating HEX file:
Translating to TI-TXT format... "MSP430_BSL.out" .BSL430_VERSION_VENDOR ==> .BSL430_VERSION_VENDOR "MSP430_BSL.out" .BSL430_VERSION_CI ==> .BSL430_VERSION_CI "MSP430_BSL.out" .BSL430_VERSION_API ==> .BSL430_VERSION_API "MSP430_BSL.out" .BSL430_VERSION_PI ==> .BSL430_VERSION_PI "MSP430_BSL.out" .text:_isr ==> .text:_isr "MSP430_BSL.out" .text ==> .text "MSP430_BSL.out" .cinit ==> .cinit "MSP430_BSL.out" RTC ==> RTC "MSP430_BSL.out" PORT2 ==> PORT2 "MSP430_BSL.out" TIMER2_A1 ==> TIMER2_A1 "MSP430_BSL.out" TIMER2_A0 ==> TIMER2_A0 "MSP430_BSL.out" USCI_B1 ==> USCI_B1 "MSP430_BSL.out" USCI_A1 ==> USCI_A1 "MSP430_BSL.out" PORT1 ==> PORT1 "MSP430_BSL.out" TIMER1_A1 ==> TIMER1_A1 "MSP430_BSL.out" TIMER1_A0 ==> TIMER1_A0 "MSP430_BSL.out" DMA ==> DMA "MSP430_BSL.out" USB_UBM ==> USB_UBM "MSP430_BSL.out" TIMER0_A1 ==> TIMER0_A1 "MSP430_BSL.out" TIMER0_A0 ==> TIMER0_A0 "MSP430_BSL.out" ADC12 ==> ADC12 "MSP430_BSL.out" USCI_B0 ==> USCI_B0 "MSP430_BSL.out" USCI_A0 ==> USCI_A0 "MSP430_BSL.out" WDT ==> WDT "MSP430_BSL.out" TIMER0_B1 ==> TIMER0_B1 "MSP430_BSL.out" TIMER0_B0 ==> TIMER0_B0 "MSP430_BSL.out" COMP_B ==> COMP_B "MSP430_BSL.out" UNMI ==> UNMI "MSP430_BSL.out" SYSNMI ==> SYSNMI "MSP430_BSL.out" .reset ==> .reset
Begging of Hex file:
@1010 00 08 08 04 @1042 32 D0 10 00 FD 3F 03 43 6A 15 21 83 0E 41 3E 80 00 1C 3F 40 FE 1B 0F 5E 8F 43 00 00 2F 83 2E 83 FB 23 82 43 0E 1D B2 40 00 A5 10 1D B2 40 00 1C 04 1D B2 40 00 1C 06 1D B2 40 41 03 0A 1D B2 40 ...
As seen above, no code was allocated to ZAREA (0x1000) section
Linker file may be found here:
/* ============================================================================ */
/* Copyright (c) 2013, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/******************************************************************************/
/* lnk_msp430f5418a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5418A PROGRAMS */
/* */
/* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */
/* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */
/* */
/*----------------------------------------------------------------------------*/
/* These linker options are for command line linking only. For IDE linking, */
/* you should set your linker options in Project Properties */
/* -c LINK USING C CONVENTIONS */
/* -stack 0x0100 SOFTWARE STACK SIZE */
/* -heap 0x0100 HEAP AREA SIZE */
/* */
/*----------------------------------------------------------------------------*/
/****************************************************************************/
/* SPECIFY THE SYSTEM MEMORY MAP */
/****************************************************************************/
MEMORY
{
SFR : origin = 0x0000, length = 0x0010
PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0
PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100
RAM : origin = 0x1C00, length = 0x4000
INFOA : origin = 0x1980, length = 0x0080
INFOB : origin = 0x1900, length = 0x0080
INFOC : origin = 0x1880, length = 0x0080
INFOD : origin = 0x1800, length = 0x0080
ZAREA : origin = 0x1000, length = 0x0010
BSL430_VERSION_VENDOR : origin = 0x1010, length = 0x0001
BSL430_VERSION_CI : origin = 0x1011, length = 0x0001
BSL430_VERSION_API : origin = 0x1012, length = 0x0001
BSL430_VERSION_PI : origin = 0x1013, length = 0x0001
ZAREA_CODE : origin = 0x1014, length = 0x002E
FLASH : origin = 0x1042, length = 0x07AE
BSLSIG : origin = 0x17F0, length = 0x000C
JTAGLOCK_KEY : origin = 0x17FC, length = 0x0004
FLASH2 : origin = 0x10000,length = 0x15C00
INT00 : origin = 0xFF80, length = 0x0002
INT01 : origin = 0xFF82, length = 0x0002
INT02 : origin = 0xFF84, length = 0x0002
INT03 : origin = 0xFF86, length = 0x0002
INT04 : origin = 0xFF88, length = 0x0002
INT05 : origin = 0xFF8A, length = 0x0002
INT06 : origin = 0xFF8C, length = 0x0002
INT07 : origin = 0xFF8E, length = 0x0002
INT08 : origin = 0xFF90, length = 0x0002
INT09 : origin = 0xFF92, length = 0x0002
INT10 : origin = 0xFF94, length = 0x0002
INT11 : origin = 0xFF96, length = 0x0002
INT12 : origin = 0xFF98, length = 0x0002
INT13 : origin = 0xFF9A, length = 0x0002
INT14 : origin = 0xFF9C, length = 0x0002
INT15 : origin = 0xFF9E, length = 0x0002
INT16 : origin = 0xFFA0, length = 0x0002
INT17 : origin = 0xFFA2, length = 0x0002
INT18 : origin = 0xFFA4, length = 0x0002
INT19 : origin = 0xFFA6, length = 0x0002
INT20 : origin = 0xFFA8, length = 0x0002
INT21 : origin = 0xFFAA, length = 0x0002
INT22 : origin = 0xFFAC, length = 0x0002
INT23 : origin = 0xFFAE, length = 0x0002
INT24 : origin = 0xFFB0, length = 0x0002
INT25 : origin = 0xFFB2, length = 0x0002
INT26 : origin = 0xFFB4, length = 0x0002
INT27 : origin = 0xFFB6, length = 0x0002
INT28 : origin = 0xFFB8, length = 0x0002
INT29 : origin = 0xFFBA, length = 0x0002
INT30 : origin = 0xFFBC, length = 0x0002
INT31 : origin = 0xFFBE, length = 0x0002
INT32 : origin = 0xFFC0, length = 0x0002
INT33 : origin = 0xFFC2, length = 0x0002
INT34 : origin = 0xFFC4, length = 0x0002
INT35 : origin = 0xFFC6, length = 0x0002
INT36 : origin = 0xFFC8, length = 0x0002
INT37 : origin = 0xFFCA, length = 0x0002
INT38 : origin = 0xFFCC, length = 0x0002
INT39 : origin = 0xFFCE, length = 0x0002
INT40 : origin = 0xFFD0, length = 0x0002
INT41 : origin = 0xFFD2, length = 0x0002
INT42 : origin = 0xFFD4, length = 0x0002
INT43 : origin = 0xFFD6, length = 0x0002
INT44 : origin = 0xFFD8, length = 0x0002
INT45 : origin = 0xFFDA, length = 0x0002
INT46 : origin = 0xFFDC, length = 0x0002
INT47 : origin = 0xFFDE, length = 0x0002
INT48 : origin = 0xFFE0, length = 0x0002
INT49 : origin = 0xFFE2, length = 0x0002
INT50 : origin = 0xFFE4, length = 0x0002
INT51 : origin = 0xFFE6, length = 0x0002
INT52 : origin = 0xFFE8, length = 0x0002
INT53 : origin = 0xFFEA, length = 0x0002
INT54 : origin = 0xFFEC, length = 0x0002
INT55 : origin = 0xFFEE, length = 0x0002
INT56 : origin = 0xFFF0, length = 0x0002
INT57 : origin = 0xFFF2, length = 0x0002
INT58 : origin = 0xFFF4, length = 0x0002
INT59 : origin = 0xFFF6, length = 0x0002
INT60 : origin = 0xFFF8, length = 0x0002
INT61 : origin = 0xFFFA, length = 0x0002
INT62 : origin = 0xFFFC, length = 0x0002
RESET : origin = 0xFFFE, length = 0x0002
}
/****************************************************************************/
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
/****************************************************************************/
SECTIONS
{
.bss : {} > RAM /* GLOBAL & STATIC VARS */
.data : {} > RAM /* GLOBAL & STATIC VARS */
.TI.noinit : {} > RAM /* For #pragma noinit */
.sysmem : {} > RAM /* DYNAMIC MEMORY ALLOCATION AREA */
.stack : {} > RAM (HIGH) /* SOFTWARE SYSTEM STACK */
.ZAREA{
BSL430_Low_Level_Init.obj(.ZAREA)
} > ZAREA
.BSL430_VERSION_VENDOR : {} > BSL430_VERSION_VENDOR
.BSL430_VERSION_CI : {} > BSL430_VERSION_CI
.BSL430_VERSION_API : {} > BSL430_VERSION_API
.BSL430_VERSION_PI : {} > BSL430_VERSION_PI
.ZAREA_CODE : {} > ZAREA_CODE
.BSLSIG : {} > BSLSIG
.JTAGLOCK_KEY : {} > JTAGLOCK_KEY
.text : {} >> FLASH | FLASH2 /* CODE */
.text:_isr : {} > FLASH /* ISR CODE SPACE */
#ifdef __LARGE_DATA_MODEL__
.cinit : {} > FLASH | FLASH2 /* INITIALIZATION TABLES */
.const : {} > FLASH | FLASH2 /* CONSTANT DATA */
#else
.cinit : {} > FLASH /* INITIALIZATION TABLES */
.const : {} > FLASH /* CONSTANT DATA */
#endif
.cio : {} > RAM /* C I/O BUFFER */
.pinit : {} > FLASH /* C++ CONSTRUCTOR TABLES */
.init_array : {} > FLASH /* C++ CONSTRUCTOR TABLES */
.mspabi.exidx : {} > FLASH /* C++ CONSTRUCTOR TABLES */
.mspabi.extab : {} > FLASH /* C++ CONSTRUCTOR TABLES */
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
.infoB : {} > INFOB
.infoC : {} > INFOC
.infoD : {} > INFOD
/* MSP430 INTERRUPT VECTORS */
.int00 : {} > INT00
.int01 : {} > INT01
.int02 : {} > INT02
.int03 : {} > INT03
.int04 : {} > INT04
.int05 : {} > INT05
.int06 : {} > INT06
.int07 : {} > INT07
.int08 : {} > INT08
.int09 : {} > INT09
.int10 : {} > INT10
.int11 : {} > INT11
.int12 : {} > INT12
.int13 : {} > INT13
.int14 : {} > INT14
.int15 : {} > INT15
.int16 : {} > INT16
.int17 : {} > INT17
.int18 : {} > INT18
.int19 : {} > INT19
.int20 : {} > INT20
.int21 : {} > INT21
.int22 : {} > INT22
.int23 : {} > INT23
.int24 : {} > INT24
.int25 : {} > INT25
.int26 : {} > INT26
.int27 : {} > INT27
.int28 : {} > INT28
.int29 : {} > INT29
.int30 : {} > INT30
.int31 : {} > INT31
.int32 : {} > INT32
.int33 : {} > INT33
.int34 : {} > INT34
.int35 : {} > INT35
.int36 : {} > INT36
.int37 : {} > INT37
.int38 : {} > INT38
.int39 : {} > INT39
.int40 : {} > INT40
RTC : { * ( .int41 ) } > INT41 type = VECT_INIT
PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT
TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT
TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT
USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT
USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT
PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT
TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT
TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT
DMA : { * ( .int50 ) } > INT50 type = VECT_INIT
USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT
TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT
TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT
ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT
USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT
USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT
WDT : { * ( .int57 ) } > INT57 type = VECT_INIT
TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT
TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT
COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT
UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT
SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT
.reset : {} > RESET /* MSP430 Reset vector */
}
/****************************************************************************/
/* INCLUDE PERIPHERALS MEMORY MAP */
/****************************************************************************/
-l msp430f5529.cmd
When chaning this section in linker file :
.ZAREA : {} > ZAREA
To this:
.ZAREA{
BSL430_Low_Level_Init.obj(.ZAREA)
} > ZAREA
Linker returns following warning on line specifing input object : "#10068-D no matching section".
I dumped BSL430_Low_Level_Init.obj using dis430 and sections appear to be created correctly:
Disassembly of BSL430_Low_Level_Init.obj:
TEXT Section .ZAREA, 0x10 bytes at 0x0 000000: .ZAREA: 000000: BSL_Entry_JMP: 000000: 053C JMP (C_Branch) 000002: 8000 BRA #SYSCTL 000004: 0000 000006: FF3F JMP (SBSLSigLoc) 000008: FF3F JMP (0x0008) 00000a: FF3F JMP (BslEntryLoc) 00000c: C_Branch: 00000c: 3040 BR #SYSCTL 00000e: 0000 TEXT Section .ZAREA_CODE, 0x2E bytes at 0x0 000000: .ZAREA_CODE: 000000: BSL_ACTION0: 000000: 3D90 CMP.W #0xdead,R13 000002: ADDE 000004: 0420 JNE (RETURN_ERROR) 000006: 3E90 CMP.W #0xbeef,R14 000008: EFBE 00000a: 0120 JNE (RETURN_ERROR) 00000c: 033C JMP (RETURN_TO_BSL) 00000e: RETURN_ERROR: 00000e: 0C43 CLR.W R12 000010: 0D43 CLR.W R13 000012: 1001 RETA 000014: RETURN_TO_BSL: 000014: 3C41 POP.W R12 000016: 3D41 POP.W R13 000018: 1001 RETA 00001a: BSL_Protect: 00001a: 0C43 CLR.W R12 00001c: B2D0 BIS.W #0x8003,&SYSCTL 00001e: 0380 000020: 0000 000022: B2B0 BIT.W #0x0010,&SYSCTL 000024: 1000 000026: 0000 000028: 0124 JEQ (BCC2BSL) 00002a: 2CD3 BIS.W #2,R12 00002c: BCC2BSL: 00002c: 1001 RETA DATA Section .BSLSIG, 0xC bytes at 0x0 000000: .BSLSIG: 000000: ffff .word 0xffff 000002: BslProtectVecLoc: 000002: 0000 .word 0x0000 000004: PBSLSigLoc: 000004: 3ca5 .word 0x3ca5 000006: SBSLSigLoc: 000006: c35a .word 0xc35a 000008: ffff .word 0xffff 00000a: BslEntryLoc: 00000a: 0000 .word 0x0000 DATA Section .JTAGLOCK_KEY, 0x4 bytes at 0x0 000000: PJTAGLOCK_KEY: 000000: .JTAGLOCK_KEY: 000000: ffff .word 0xffff 000002: SJTAGLOCK_KEY: 000002: ffff .word 0xffff
Is this problem related to project configuration? When trying to build this project for the first time, environment prompted me to change compiler version, as this used in project was outdated.
Thank you for any help or tips where to look for problem.
Tom
