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Compiler/AM3359: .data Section Uninitialized

Raja Koteswara Rao
Intellectual 530 points
Part Number: AM3359


Tool/software: TI C/C++ Compiler

Hi,

I am using the CCS6.0.1.00040 and TI v 5.1.4. When I am building starter ware boot loader code , in .map file it is showing the .data section uninitialized. The global variables are uninitialized. It is initializing the global variables with garbage values. For example consider the following global variable

tOPPConfig oppTable[] =
{
    {MPUPLL_M_275_MHZ, PMIC_VOLT_SEL_1100MV},  /* OPP100 275Mhz - 1.1v */
    {MPUPLL_M_500_MHZ, PMIC_VOLT_SEL_1100MV},  /* OPP100 500Mhz - 1.1v */
    {MPUPLL_M_600_MHZ, PMIC_VOLT_SEL_1200MV},  /* OPP120 600Mhz - 1.2v */
    {MPUPLL_M_720_MHZ, PMIC_VOLT_SEL_1260MV},  /* OPP TURBO 720Mhz - 1.26v */
    {MPUPLL_M_300_MHZ, PMIC_VOLT_SEL_0950MV},  /* OPP50 300Mhz - 950mv */
    {MPUPLL_M_300_MHZ, PMIC_VOLT_SEL_1100MV},  /* OPP100 300Mhz - 1.1v */
    {MPUPLL_M_600_MHZ, PMIC_VOLT_SEL_1100MV},  /* OPP100 600Mhz - 1.1v */
    {MPUPLL_M_720_MHZ, PMIC_VOLT_SEL_1200MV},  /* OPP120 720Mhz - 1.2v */
    {MPUPLL_M_800_MHZ, PMIC_VOLT_SEL_1260MV},  /* OPP TURBO 800Mhz - 1.26v */
    {MPUPLL_M_1000_MHZ, PMIC_VOLT_SEL_1325MV}  /* OPP NITRO 1000Mhz - 1.325v */
};

The entire oppTable[] is initialized with garbage values.

My linker .cmd file is

-stack  0x0008                             /* SOFTWARE STACK SIZE           */
-heap   0x2000                             /* HEAP AREA SIZE                */
-e Entry
/* Since we used 'Entry' as the entry-point symbol the compiler issues a    */
/* warning (#10063-D: entry-point symbol other than "_c_int00" specified:   */
/* "Entry"). The CCS Version (5.1.0.08000) stops building from command      */
/* line when there is a warning. So this warning is suppressed with the     */
/* below flag. */

--diag_suppress=10063

/* SPECIFY THE SYSTEM MEMORY MAP */

MEMORY
{
        IRAM_MEM        : org = 0x402F0400  len = 0x1FBFF            /* RAM */
}

/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */

SECTIONS
{
    .init    : {
                 bl_init.obj (.text)
               } load > 0x402F0400

    .text    : load > IRAM_MEM              /* CODE                         */
    .data    : load > IRAM_MEM              /* INITIALIZED GLOBAL AND STATIC VARIABLES. */
    .bss     : load > IRAM_MEM              /* UNINITIALIZED OR ZERO INITIALIZED */
                                            /* GLOBAL & STATIC VARIABLES.   */
                    RUN_START(bss_start)
                    RUN_END(bss_end)
    .const   : load > IRAM_MEM              /* GLOBAL CONSTANTS             */
    .cinit   : load > IRAM_MEM
    .stack   : load > 0x4030FFF0            /* SOFTWARE SYSTEM STACK        */

}

My memory map file .map file is

ENTRY POINT SYMBOL: "Entry"  address: 402f0400


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
  IRAM_MEM              402f0400   0001fbff  0000fbe1  0001001e  RWIX


SEGMENT ALLOCATION MAP

run origin  load origin   length   init length attrs members
----------  ----------- ---------- ----------- ----- -------
402f0400    402f0400    0000ef2c   0000ef2c    r-x
  402f0400    402f0400    00000088   00000088    r-x .init
  402f0488    402f0488    0000eea4   0000eea4    r-x .text
402ff32c    402ff32c    00000c00   00000000    rw-
  402ff32c    402ff32c    00000a1d   00000000    rw- .bss
  402ffd4c    402ffd4c    000001e0   00000000    rw- .data
402fff2c    402fff2c    00000020   00000020    r--
  402fff2c    402fff2c    00000020   00000020    r-- .const
402fff50    402fff50    00000090   00000090    r--
  402fff50    402fff50    00000090   00000090    r-- .cinit
4030fff0    4030fff0    00000008   00000000    rw-
  4030fff0    4030fff0    00000008   00000000    rw- .stack


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.init      0    402f0400    00000088     
                  402f0400    00000088     bl_init.obj (.text)

.text      0    402f0488    0000eea4     
                  402f0488    00001d10     drivers.lib : uart_irda_cir.obj (.text)
                  402f2198    00001c8c                 : gpmc.obj (.text)
                  402f3e24    000019f8     utils.lib : uartStdio.obj (.text)
                  402f581c    00001338     bl_platform.obj (.text)
                  402f6b54    000012a8     libnand.lib : nand_gpmc.obj (.text)
                  402f7dfc    00001100                 : nandlib.obj (.text)
                  402f8efc    00000b50     drivers.lib : gpio_v2.obj (.text)
                  402f9a4c    00000ad0                 : hsi2c.obj (.text)
                  402fa51c    000009e4     platform.lib : gpio.obj (.text)
                  402faf00    000007d4                  : SDS_DPE_Host_Pinmux.obj (.text)
                  402fb6d4    000007c0     drivers.lib : elm.obj (.text)
                  402fbe94    000006f0     platform.lib : dmtimer.obj (.text)
                  402fc584    0000069c     drivers.lib : dmtimer.obj (.text)
                  402fcc20    00000638     utils.lib : ascii.obj (.text)
                  402fd258    00000448     platform.lib : hsi2c.obj (.text)
                  402fd6a0    0000042c                  : uart.obj (.text)
                  402fdacc    000003e4     system.lib : interrupt.obj (.text)
                  402fdeb0    00000380     bl_nand.obj (.text)
                  402fe230    00000310     platform.lib : nand.obj (.text)
                  402fe540    00000280     utils.lib : consoleUtils.obj (.text)
                  402fe7c0    00000220     platform.lib : cpld.obj (.text)
                  402fe9e0    00000180     rtsv7A8_A_le_eabi.lib : memcpy32.obj (.text)
                  402feb60    00000170     platform.lib : sysdelay.obj (.text)
                  402fecd0    0000014c                  : uartConsole.obj (.text)
                  402fee1c    000000f0     rtsv7A8_A_le_eabi.lib : u_div32.obj (.text)
                  402fef0c    000000d4                           : auto_init.obj (.text)
                  402fefe0    000000b0                           : memset32.obj (.text)
                  402ff090    00000098                           : copy_decompress_rle.obj (.text)
                  402ff128    00000080                           : cpy_tbl.obj (.text)
                  402ff1a8    00000060     system.lib : cpu.obj (.text)
                  402ff208    00000054     main.obj (.text)
                  402ff25c    0000004c     utils.lib : delay.obj (.text)
                  402ff2a8    00000038     system.lib : device.obj (.text)
                  402ff2e0    00000020     rtsv7A8_A_le_eabi.lib : copy_zero_init.obj (.text:decompress:ZI)
                  402ff300    00000014                           : copy_decompress_none.obj (.text:decompress:none)
                  402ff314    0000000c     system.lib : cpu.obj (.text:CPUIntStatus)
                  402ff320    00000008     rtsv7A8_A_le_eabi.lib : copy_decompress_rle.obj (.text:decompress:rle24)
                  402ff328    00000004                           : i_div0.obj (.text)

.bss       0    402ff32c    00000a1d     UNINITIALIZED
                  402ff32c    00000800     bl_nand.obj (.bss:rxData)
                  402ffb2c    00000200     system.lib : interrupt.obj (.bss:fnRAMVectors)
                  402ffd2c    00000004     (.common:dataFromSlave)
                  402ffd30    00000004     (.common:dataToSlave)
                  402ffd34    00000004     (.common:deviceVersion)
                  402ffd38    00000004     (.common:freqMultDDR)
                  402ffd3c    00000004     (.common:oppMaxIdx)
                  402ffd40    00000004     (.common:rCount)
                  402ffd44    00000004     (.common:tCount)
                  402ffd48    00000001     (.common:ConsoleType)

.data      0    402ffd4c    000001e0     UNINITIALIZED
                  402ffd4c    00000108     bl_nand.obj (.data)
                  402ffe54    000000cc     bl_platform.obj (.data)
                  402fff20    00000008     main.obj (.data)
                  402fff28    00000004     platform.lib : sysdelay.obj (.data)

.const     0    402fff2c    00000020     
                  402fff2c    00000014     utils.lib : uartStdio.obj (.const:.string)
                  402fff40    00000008     bl_platform.obj (.const:.string)
                  402fff48    00000004     utils.lib : uartStdio.obj (.const)

.cinit     0    402fff50    00000090     
                  402fff50    0000006a     (.cinit..data.load) [load image, compression = rle]
                  402fffba    00000002     --HOLE-- [fill = 0]
                  402fffbc    0000000c     (__TI_handler_table)
                  402fffc8    00000008     (.cinit..bss.load) [load image, compression = zero_init]
                  402fffd0    00000010     (__TI_cinit_table)

.stack     0    4030fff0    00000008     UNINITIALIZED
                  4030fff0    00000008     --HOLE--


LINKER GENERATED COPY TABLES

__TI_cinit_table @ 402fffd0 records: 2, size/record: 8, table size: 16
    .data: load addr=402fff50, load size=0000006a bytes, run addr=402ffd4c, run size=000001e0 bytes, compression=rle
    .bss: load addr=402fffc8, load size=00000008 bytes, run addr=402ff32c, run size=00000a1d bytes, compression=zero_init


LINKER GENERATED HANDLER TABLE

__TI_handler_table @ 402fffbc records: 3, size/record: 4, table size: 12
    index: 0, handler: __TI_decompress_rle24
    index: 1, handler: __TI_decompress_none
    index: 2, handler: __TI_zero_init

Please help us where the error is occurring.

Thanks and Regards

Raja

  • 0
    TI__Guru**** 251450 points

    I don't know what's wrong.  I don't see how to work out the error based on what is shown here.  My guess is you have some hardware configuration error.  To help you find that, I think it useful to have a better understanding of how C code starts running.

    In the ARM compiler manual, please see the section titled System Initialization.  Pay particular attention to the sub-section titled Autoinitialization of Variables at Run Time.  It is clear you link using the option --rom_model.  Here is a summary of how things work in that case.  The .data section is an initialized section in individual object files.  The linker collects all those .data input sections together into an output section also named .data, compresses it, and puts that into a section named .cinit.  Then the .data output section changes to an uninitialized section.  Everything you show in the linker command file is consistent with this description.  I hope that, with a better understanding of how these initialization steps are designed, you can find the root cause of the problem.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Intellectual 530 points

    Sir,

    Thank you for solving my issue.
    In ARM linker changing the flags from --rom_model to --ram_model solves the problem.
    Could you please explain what is the difference between --rom_model and --ram_model. According to the ARM compiler manual, it says that

    --rom_model initializes the variables at run time.

    --ram_model it is preinitialized.

    So both should work.

    In the reply what does exactly Hardware configuration error means ? How to find out that error ?

    Thanks and regards

    Raja

  • 0 in reply to Raja Koteswara Rao
    Intellectual 530 points

    Sir ,

    I tried one solution it is working fine.

    In bl_init.asm file it contains the following code.

            .global Entry
            .global start_boot
            .global __TI_auto_init

            .ref __stack
            .ref bss_start
            .ref bss_end
            .ref start_boot
            .ref main

    ;************************ Internal Definitions ******************************
    ;
    ; Define the stack sizes for different modes. The user/system mode will use
    ; the rest of the total stack size
    ;

    UND_STACK_SIZE .set 0x8
    ABT_STACK_SIZE .set 0x8
    FIQ_STACK_SIZE .set 0x8
    IRQ_STACK_SIZE .set 0x100
    SVC_STACK_SIZE .set 0x8

    ;
    ; to set the mode bits in CPSR for different modes
    ;

    MODE_USR .set 0x10
    MODE_FIQ .set 0x11
    MODE_IRQ .set 0x12
    MODE_SVC .set 0x13
    MODE_ABT .set 0x17
    MODE_UND .set 0x1B
    MODE_SYS .set 0x1F

    I_F_BIT .set 0xC0

    ;**************************** Code Seection ***********************************
            .text

    ;
    ; This code is assembled for ARM instructions
    ;
            .state32

    ;******************************************************************************
    ;
    ;******************************************************************************
    ;
    ; The reset handler sets up the stack pointers for all the modes. The FIQ and
    ; IRQ shall be disabled during this. Then, clearthe BSS sections, switch to the
    ;  main() function.
    ;
    Entry:
    ;
    ; Set up the Stack for Undefined mode
    ;
             LDR   r0, _stackptr                     ; Read the stack address
             MSR   cpsr_c, #MODE_UND|I_F_BIT       ; switch to undef  mode
             MOV   sp,r0                           ; write the stack pointer
             SUB   r0, r0, #UND_STACK_SIZE         ; give stack space
    ;
    ; Set up the Stack for abort mode
    ;
             MSR   cpsr_c, #MODE_ABT|I_F_BIT       ; Change to abort mode
             MOV   sp, r0                          ; write the stack pointer
             SUB   r0,r0, #ABT_STACK_SIZE          ; give stack space
    ;
    ; Set up the Stack for FIQ mode
    ;
             MSR   cpsr_c, #MODE_FIQ|I_F_BIT       ; change to FIQ mode
             MOV   sp,r0                           ; write the stack pointer
             SUB   r0,r0, #FIQ_STACK_SIZE          ; give stack space
    ;
    ; Set up the Stack for IRQ mode
    ;
             MSR   cpsr_c, #MODE_IRQ|I_F_BIT       ; change to IRQ mode
             MOV   sp,r0                           ; write the stack pointer
             SUB   r0,r0, #IRQ_STACK_SIZE          ; give stack space
    ;
    ; Set up the Stack for SVC mode
    ;
             MSR   cpsr_c, #MODE_SVC|I_F_BIT       ; change to SVC mode
             MOV   sp,r0                           ; write the stack pointer
             SUB   r0,r0, #SVC_STACK_SIZE          ; give stack space
    ;
    ; Set up the Stack for USer/System mode
    ;
             MSR   cpsr_c, #MODE_SYS|I_F_BIT       ; change to system mode
             MOV   sp,r0                           ; write the stack pointer
    ;
    ; Clear the BSS section here
    ;
    Clear_Bss_Section:

             LDR   r0, _bss_start                 ; Start address of BSS
             LDR   r1, _bss_end                   ; End address of BSS
             SUB   r1,r1,#4
             MOV   r2, #0
    Loop:
             STR   r2, [r0], #4                    ; Clear one word in BSS
             CMP   r0, r1
             BLE   Loop                            ; Clear till BSS end

    ; Enter the start_boot function. The execution still happens in system mode
    ;
             LDR   r10, _main                 ; Get the address of main
             MOV   lr,pc                           ; Dummy return to main
             BX    r10                             ; Branch to main
             SUB   pc, pc, #0x08                   ; looping

    ;         MSR   cpsr_c, #MODE_SVC|I_F_BIT       ; change to SVC mode
    ;         BX   lr
    ;
    ; End of the file
    ;

    _stackptr:
        .word __stack
    _bss_start:
        .word bss_start
    _bss_end:
        .word bss_end
    _main:
        .word main
    _data_auto_init:
        .word __TI_auto_init
             .end

    In that code after initializing stack and clearing .bss section we are directly calling main. But TI ARM compiler says that for --rom.model . After initialization of stack it should call __TI_auto_init function and then it should call main. So i added a the following code after clear bss section.

            .global Entry
            .global start_boot
            .global __TI_auto_init

            .ref __stack
            .ref bss_start
            .ref bss_end
            .ref start_boot
            .ref main

    ;************************ Internal Definitions ******************************
    ;
    ; Define the stack sizes for different modes. The user/system mode will use
    ; the rest of the total stack size
    ;

    UND_STACK_SIZE .set 0x8
    ABT_STACK_SIZE .set 0x8
    FIQ_STACK_SIZE .set 0x8
    IRQ_STACK_SIZE .set 0x100
    SVC_STACK_SIZE .set 0x8

    ;
    ; to set the mode bits in CPSR for different modes
    ;

    MODE_USR .set 0x10
    MODE_FIQ .set 0x11
    MODE_IRQ .set 0x12
    MODE_SVC .set 0x13
    MODE_ABT .set 0x17
    MODE_UND .set 0x1B
    MODE_SYS .set 0x1F

    I_F_BIT .set 0xC0

    ;**************************** Code Seection ***********************************
            .text

    ;
    ; This code is assembled for ARM instructions
    ;
            .state32

    ;******************************************************************************
    ;
    ;******************************************************************************
    ;
    ; The reset handler sets up the stack pointers for all the modes. The FIQ and
    ; IRQ shall be disabled during this. Then, clearthe BSS sections, switch to the
    ;  main() function.
    ;
    Entry:
    ;
    ; Set up the Stack for Undefined mode
    ;
             LDR   r0, _stackptr                     ; Read the stack address
             MSR   cpsr_c, #MODE_UND|I_F_BIT       ; switch to undef  mode
             MOV   sp,r0                           ; write the stack pointer
             SUB   r0, r0, #UND_STACK_SIZE         ; give stack space
    ;
    ; Set up the Stack for abort mode
    ;
             MSR   cpsr_c, #MODE_ABT|I_F_BIT       ; Change to abort mode
             MOV   sp, r0                          ; write the stack pointer
             SUB   r0,r0, #ABT_STACK_SIZE          ; give stack space
    ;
    ; Set up the Stack for FIQ mode
    ;
             MSR   cpsr_c, #MODE_FIQ|I_F_BIT       ; change to FIQ mode
             MOV   sp,r0                           ; write the stack pointer
             SUB   r0,r0, #FIQ_STACK_SIZE          ; give stack space
    ;
    ; Set up the Stack for IRQ mode
    ;
             MSR   cpsr_c, #MODE_IRQ|I_F_BIT       ; change to IRQ mode
             MOV   sp,r0                           ; write the stack pointer
             SUB   r0,r0, #IRQ_STACK_SIZE          ; give stack space
    ;
    ; Set up the Stack for SVC mode
    ;
             MSR   cpsr_c, #MODE_SVC|I_F_BIT       ; change to SVC mode
             MOV   sp,r0                           ; write the stack pointer
             SUB   r0,r0, #SVC_STACK_SIZE          ; give stack space
    ;
    ; Set up the Stack for USer/System mode
    ;
             MSR   cpsr_c, #MODE_SYS|I_F_BIT       ; change to system mode
             MOV   sp,r0                           ; write the stack pointer
    ;
    ; Clear the BSS section here
    ;
    Clear_Bss_Section:

             LDR   r0, _bss_start                 ; Start address of BSS
             LDR   r1, _bss_end                   ; End address of BSS
             SUB   r1,r1,#4
             MOV   r2, #0
    Loop:
             STR   r2, [r0], #4                    ; Clear one word in BSS
             CMP   r0, r1
             BLE   Loop                            ; Clear till BSS end

             LDR   r10, _data_auto_init                ; Get the address of ti_auto_init
             MOV   lr, pc                           ; Dummy return to ti_auto_init
             BX    r10                                ; Branch to ti_auto_init

    ; Enter the start_boot function. The execution still happens in system mode
    ;
             LDR   r10, _main                 ; Get the address of main
             MOV   lr,pc                           ; Dummy return to main
             BX    r10                             ; Branch to main
             SUB   pc, pc, #0x08                   ; looping

    ;         MSR   cpsr_c, #MODE_SVC|I_F_BIT       ; change to SVC mode
    ;         BX   lr
    ;
    ; End of the file
    ;

    _stackptr:
        .word __stack
    _bss_start:
        .word bss_start
    _bss_end:
        .word bss_end
    _main:
        .word main
    _data_auto_init:
        .word __TI_auto_init
             .end

    The above code is initializing the global variables and working fine for --rom_model.

    Can you please confirm that it is the right way to do it or did we do anything wrong?.

    Can you please explain in general which model is best ? --rom_model or --ram model and also for boot loader which model is best ?

    Can you please explain what are the advantages and disadvantages of --rom and --ram model ?

  • 0 in reply to Raja Koteswara Rao
    TI__Guru**** 251450 points

    You are using startup code that does not come from the compiler RTS library.  I am not familiar with your startup code, which is contained in a file named bl_init.asm.  This is OK, except for one thing.  The code in bl_init.asm presumes you link with --ram_model.  You changed it so it presumes you link with --rom_model.

    Use --rom_model when the device must boot itself from power on, with no assistance from other parts of the system.  One typical scenario is everything is resident in flash memory, and when power is applied, the device starts by executing some particular interrupt, and this interrupt causes the startup code to start running.  Use --ram_model when some external mechanism can copy code and data into system memory, and then start execution.  In that case, view .data as yet another initialized section copied into memory.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Intellectual 530 points

    We are using Am335x starter ware boot loader code for our Board for booting purpose. The file bl_init.asm is included in the starter ware boot loader code and we are using the same.

    Thanks and Regards

    Raja