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F283X simulator: Assembly single step costs 6 clock cycles



Hi,

I need to write very fast FPU code, so I must do it in assembler.

When I debug this code with single step assembly each step costs 6 cycles. I think this is because the simulator empties the pipeline every time it stops. Unfortunately this hides code that need several pipeline cycles. Is there any way to change this behavior?

Another thing I want to check is how access to external memory slows CPU down.

Thanks

 

  • There are several low cost hardware platform available for you to develop code and to bench mark the performance... I never felt confident about using a simulator specially when I can use the actual hardware. Depending on the device you should have option of using one of the control cards, or other hardware platform. Good luck.

  • Unfortunately this does not help much.

    An emulator must empty the pipeline to work. So there is no advantage to the simulator.

    Previous I used a C6713 simulator. There the single step assembly was 1 cycle. You could see whether a register was loaded in the next cycle or not. I'd like to have the same for my delfino.

    Gustl

     

  • Windows->Preferences.   Expand CCS->Debug->Debugger Options->Generic.  Scroll down and there is a option called "Simulators will flush the pipeline on halt".  You can also get to this option from within a debug session by going to tools->Generic Debugger Options.

     

    John