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CCS/TMS320C6713: How does the break point halts the CPU?

kowalski
Expert 1285 points
Part Number: TMS320C6713


Tool/software: Code Composer Studio

Hi,

I know what Hardware break points and software break points are... The following article explains it in quite nicely.

http://processors.wiki.ti.com/index.php/How_Do_Breakpoints_Work

The article explains how Break points are detected... My question is, if a break point is detected, how exactly the emulator stops the CPU at specific point at which the break point has been detected????? What are the signals etc. that are given to processor to stop it.???

  • 0
    TI__Guru 65405 points
    Hi Aimal,

    I've forwarded this to the software experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • 0 in reply to Cvetolin Shulev-XID
    Expert 1285 points

    Bundles of thanks Cvetolin Shulev-XID...

    Waiting for software experts response.

  • 0
    TI__Guru* 84110 points
    Aimal,

    It sounds like you are asking how TI managed to designed a multi-stage pipeline processor with an integrated emulation logic set that allows for seamless and non-intrusive observability and controllability of the CPU architecture as it runs and steps. If you are wanting a detailed description of the signals involved in that design, you would be asking for the subject of numerous patents and proprietary design databases.

    Perhaps you are asking a much simpler question that might actually be answered on a public forum. In that case, please explain in more detail what you are asking for and why you need this information.

    Regards,
    RandyP
  • 0 in reply to RandyP
    Expert 1285 points
    Thanks RandyP for your reply.

    Actually i have o such intention to have access to any proprietary design database. I am doing it purely on research purpose, out of curiosity... I was digging it out... like consider i attach a JTAG emulator to tms320c6713, upon receiving a software breakpoint...... how the JTAG internally stops DSP core right at the break point!!!!! what happens inside??? Are there some internal pins, let say, if pulled down will stop the CPU???? I just need a broad overview... like what happens GENERALLY????

    Regards,
    Aimal
  • 0 in reply to kowalski
    TI__Guru* 84110 points

    Aimal,

    For software breakpoints, CCS replaces an instruction with a Breakpoint instruction. When that Breakpoint instruction is reached, the processor halts, signals to CCS that it is halted, and CCS returns the instruction that was originally there so it can be executed correctly.

    For hardware breakpoints, register settings are defined by the user and programmed into the internal emulation logic to detect a selected condition. The emulation logic halts the processor if that is how the user programs it.

    You may get some better overview information from TMS320C6000: Board Design for JTAG.

    Regards,

    RandyP