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CCS/TCIEVMK2X: Debug hello world in CCSV7

Balakrishnan Ramalingam
Prodigy 230 points

Part Number: TCIEVMK2X

Tool/software: Code Composer Studio

Hi,

 
i am using ccsv7 and TCIEVMk2x board  (have XDS200 emulator) . I, have facing following error when i debug the hello.out into DSP core0 .

C66xx_0: Trouble Reading Memory Block at 0x8000 on Page 0 of Length 0x4: (Error -1190 @ 0x8000) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.504.1)
C66xx_0: File Loader: Verification failed: Target failed to read 0x00008000
C66xx_0: GEL: File: C:\ti\workspace_v7\blinky777\hello_world_dsp\Debug\hello_world_dsp.out: Load failed.

Here with i attached GEL file output

C66xx_0: GEL Output:
Connecting Target...
C66xx_0: GEL Output: TCI6638K2K GEL file Ver is 1.29999995
C66xx_0: GEL Output: Detected PLL bypass disabled: SECCTL[BYPASS] = 0x00000000
C66xx_0: GEL Output: (3a) PLLCTL = 0x00000040
C66xx_0: GEL Output: (3b) PLLCTL = 0x00000040
C66xx_0: GEL Output: (3c) Delay...
C66xx_0: GEL Output: (4)PLLM[PLLM] = 0x0000000F
C66xx_0: GEL Output: MAINPLLCTL0 = 0x07000000
C66xx_0: GEL Output: (5) MAINPLLCTL0 = 0x07000000
C66xx_0: GEL Output: (5) MAINPLLCTL1 = 0x00000040
C66xx_0: GEL Output: (6) MAINPLLCTL0 = 0x07000000
C66xx_0: GEL Output: (7) SECCTL = 0x00090000
C66xx_0: GEL Output: (8a) Delay...
C66xx_0: GEL Output: PLL1_DIV3 = 0x00008002
C66xx_0: GEL Output: PLL1_DIV4 = 0x00008004
C66xx_0: GEL Output: PLL1_DIV7 = 0x00000000
C66xx_0: GEL Output: (8d/e) Delay...
C66xx_0: GEL Output: (10) Delay...
C66xx_0: GEL Output: (12) Delay...
C66xx_0: GEL Output: (13) SECCTL = 0x00090000
C66xx_0: GEL Output: (Delay...
C66xx_0: GEL Output: (Delay...
C66xx_0: GEL Output: (14) PLLCTL = 0x00000041
C66xx_0: GEL Output: PLL has been configured (CLKIN * PLLM / PLLD / PLLOD = PLLOUT):
C66xx_0: GEL Output: PLL has been configured (122.879997 MHz * 16 / 1 / 2 = 983.039978 MHz)
C66xx_0: GEL Output: Power on all PSC modules and DSP domains...
C66xx_0: GEL Output: Set_PSC_State... Timeout Error #03 pd=27, md=48!
C66xx_0: GEL Output: Power on all PSC modules and DSP domains... Done.
C66xx_0: GEL Output: WARNING: SYSCLK is the input to the PA PLL.
C66xx_0: GEL Output: Completed PA PLL Setup
C66xx_0: GEL Output: PAPLLCTL0 - before: 0x0x07080400 after: 0x0x07080400
C66xx_0: GEL Output: PAPLLCTL1 - before: 0x0x00002040 after: 0x0x00002040
C66xx_0: GEL Output: DDR begin
C66xx_0: GEL Output: XMC setup complete.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup ...
C66xx_0: GEL Output: DDR3 PLL Setup complete, DDR3A clock now running at 666 MHz.
C66xx_0: GEL Output: DDR3A initialization complete
C66xx_0: GEL Output: DDR3 PLL Setup ...
C66xx_0: GEL Output: DDR3 PLL Setup complete, DDR3B clock now running at 800MHz.
C66xx_0: GEL Output: DDR3B initialization complete
C66xx_0: GEL Output: DDR done

Kindly help me to resolve this issue .i am pretty new with this software.

  • 0
    Guru 92251 points

    Balakrishnan Ramalingam said:
    I, have facing following error when i debug the hello.out into DSP core0 .

    C66xx_0: Trouble Reading Memory Block at 0x8000 on Page 0 of Length 0x4: (Error -1190 @ 0x8000) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.504.1)
    C66xx_0: File Loader: Verification failed: Target failed to read 0x00008000
    C66xx_0: GEL: File: C:\ti\workspace_v7\blinky777\hello_world_dsp\Debug\hello_world_dsp.out: Load failed.

    The error has occurred because an attempt has been made to write the program to address 0x00008000, which according to table 8.1 Memory Map Summary for TCI6638K2K in the TCI6638K2K datasheet is Reserved in the DSP view.

    When I created a hello example for a C66 core of a TCI6638K2K in CCS 7.1 no linker command file (.cmd) was added to the project, which had the effect of the linker using a default RAM memory region at address 0x8000 which explains the error on attempting to load the program.

    If you go to the Project Properties under CCS General -> Advanced settings change the linker command file from <blank> to "66AK2Gxx_C66.cmd" :

    The 66AK2Gxx_C66.cmd file will place the program in L2 SRAM starting at address 0x00800000, which should then allow the example to load and run.

    [66AK2Gxx_C66.cmd is not an exact match for your TCI6638K2K device, but is the closest match of a Keystone II device in the CCS supplied example linker command files]

  • 0 in reply to Chester Gillon
    Prodigy 230 points
    Hi Gillon

    Thank you so much. Now its working issue resolved