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CCS/EK-TM4C123GXL: Data Verification Error when using named memory sections + Debug port error when running custom Linker Command File

Part Number: EK-TM4C123GXL


Tool/software: Code Composer Studio

Hello.

I have been having a terrible time getting CCS(the most recent release) working with assembly programming on the Tiva Launchpad, I think I have narrowed down my errors to being caused by the following:

In the command file if I reference a named memory location to allow the linker to auto locate custom named sections, I get a data verification error when I go to debug. If I instead reference a specific address to locate the section at it works. 

In addition if it does load I get a debug port error but the debugging process appears to work OK.

edit: I also tried disabling data verification in the project debug options, when I do the debugger loads and everything looks to be correct in the memory map.

I think something is broke with CCS debugger or my board is some how damaged(which I dont think it is, as when I debug a C program, everything works fine)

Here is the project:

ASMProject.zip

  • Michael Lowell said:
    In the command file if I reference a named memory location to allow the linker to auto locate custom named sections, I get a data verification error when I go to debug.

    I loaded your project onto a TM4C123 Launchpad several times and did not get a data verification error. I did, however, get the debug port error and I think that may be a bug in CCS 7.1.0 as I don't see the debug port error in CCS 6.2.0 or even 7.0. I will file a bug report for that and  then post the tracking number here.

    Regarding the data verification error are you able to reproduce that consistently? 

  • Hello, thanks.

    I am getting the data verification error consistently, ex: I just started CCS, ran my project with the "main" section put into FLASH and I get the data verification error. I then switch to locating the section at a specific address, ex: 0x400 and the debugger is able to load and run(again I get the port error).

    The interesting thing is when the program does load, in the debuggers memory view I see sporadic random values in the Flash memory range between 4 and 0x400(the start of main) - ex at 0x100 and 0x180. These values should be blanked, there should be no instructions or data located at these addresses.

    I don't know if this means my board is broke or not(but I haven't attached it to anything else at this point so I don't see how I could have damaged it). It's possible there is something wrong going on with the USB communication, I don't know but looking at this memory map, I don't think it's what it is supposed to be. 

    Could there be extra includes modifying these addresses? I could see it for the interrupt vectors but 0x180 is outside of the range - it seems to be a completely random address. 

  • Michael Lowell said:
    The interesting thing is when the program does load, in the debuggers memory view I see sporadic random values in the Flash memory range between 4 and 0x400(the start of main) - ex at 0x100 and 0x180. These values should be blanked, there should be no instructions or data located at these addresses.

    Does deleting the cache debugger information in steps 3 and 4 of the CCS Debugger troubleshooting help?

    If that doesn't help, can you enable Debug Server Logging and attach the log when you see the sporadic random values in flash, as the log should show what flash ranges the CCS debugger is programming.

  • Hello

    I deleted the cache files, my first time loading I got no errors. I changed the section location and I got a verification error so it did make a difference but at this point its giving me data verification error regardless of where I locate main so I cant produce the file. I will mess with it more later and upload the file when it eventually loads.

    I downloaded CCS v6 and everything works, I tried relocating different sections and no bugs. This indicates its someproblem with the most recent release of CCS.

    I will try a prior version of v7


    Thanks for the help.

  • Ok, it did it again(using most recent version, v7.1), here is the log file: There is sporadic random junk between flash memory 0x4 and 0x500, example at 0x180

    3175.log.log

  • I can reproduce the data verification error. It seems related to placing the "vec" section at address 0x0. If I change it to any other address like 0x4 or 0x8, there is no error. Can you confirm if that is the case for you as well? I also checked that loading to address 0x0 works fine in CCS 7.0. I will file a bug report for this as well so it gets looked at. Thank you for bringing this to our attention.

  • I filed bug # CCBT-2098 to track this issue. You may check its status using the SDOWP link in my signature (note it usually takes a few hours after submission to appear at that link).

  • Thank you, I for me it appears to be a problem regardless of a section being located at 0x0 or not but if a solution is found to the 0x0 error, it is likely the cause of the more general problem.

    Also I am trying CCS 7.0.0.0042 and everything appears to work.

    I don't feel like downloading the next version but something appears to have been broken between this version and the latest. Thanks for the help and I hope it gets fixed soon!(I will use 7.0....42 from now until next update). Have to say I spent way too much time on this!