Other Parts Discussed in Thread: AM3359
Tool/software: Code Composer Studio
Was using CCS 7.1.0.00016 running under Ubuntu 16.04 LTS to attempt to debug a bootloader on the Cortex-A8 of an AM3352, where the bootloader should be loaded and run in the "SRAM internal" region from 0x402F0400 .. 0x402FFFFF. The bootloader is compiled using the gcc-arm-none-eabi-4_9-2015q3 compiler.
When attempting to load the program the load fails with the following error reported in the console:
CortxA8: Output: **** AM3352_SOM Initialization is in progress .......... CortxA8: Output: **** AM335x ALL PLL Config for OPP == Turbo is in progress ......... CortxA8: Output: Input Clock Read from SYSBOOT[15:14]: 24MHz CortxA8: Output: **** Going to Bypass... CortxA8: Output: **** Bypassed, changing values... CortxA8: Output: **** Locking ARM PLL CortxA8: Output: **** Core Bypassed CortxA8: Output: **** Now locking Core... CortxA8: Output: **** Core locked CortxA8: Output: **** PER DPLL Bypassed CortxA8: Output: **** PER DPLL Locked CortxA8: Output: **** AM335x ALL PLL Config for OPP == Turbo is done ......... CortxA8: Output: **** AM3352_SOM Initialization is Done ****************** CortxA8: Trouble Writing Memory Block at 0x402f0074 on Page 0 of Length 0x7ff0: (Error -1065 @ 0x3D5A) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.628.1) CortxA8: File Loader: Verification failed: Target failed to write 0x402F0074 CortxA8: GEL: File: /home/mr_halfword/AM3352-SOM-EVB_bare_metal/Debug/bootloader/bootloader.out: Load failed.
The debugger reports that is attempt to write a memory block of size 0x7ff0 bytes starting at address 0x402f0074. However, that starting address and size doesn't match the sections in the program. Running the cg_xml sectti utility on the bootloader ELF file confirms that the starting load address is 0x402f0400 as expected:
~/ti/cg_xml/utils/ofd6x -x bootloader/bootloader.out | ~/ti/cg_xml/bin/sectti Reading from stdin ... ************************************************************ REPORT FOR FILE: bootloader/bootloader.out ************************************************************ Name : Size (dec) Size (hex) Type Load Addr Run Addr -------------------- : ---------- ---------- ---- ---------- ---------- .rsthand : 32 0x00000020 CODE 0x402f0400 0x402f0400 .text : 35168 0x00008960 CODE 0x402f0420 0x402f0420 .data : 1084 0x0000043c DATA 0x402f8d88 0x402f8d88 .bss : 2184 0x00000888 UDATA 0x402f9200 0x402f9200 .stack : 8192 0x00002000 UDATA 0x402f9a90 0x402f9a90 ------------------------------------------------------------ Totals by section type ------------------------------------------------------------ Uninitialized Data : 10376 0x00002888 Initialized Data : 1084 0x0000043c Code : 35200 0x00008980
Attached is the debug server log file from a failure to load. 4645.debug_server.log.zip
Searching the debug server log for the incorrect load address 0x402f0074 shows it first appears in the part of the log which is about parsing the ELF information for the program to be loaded:
0x7FD3469FB700 320382 4 OFS I: PT_LOAD: 0x7FD3469FB700 320382 4 OFS D: OFS LOAD Section added: name: .text 0x7FD3469FB700 320382 4 OFS D: size in bytes: 37200, or 0x9150 0x7FD3469FB700 320382 4 OFS D: load location: 0x402f0074 0x7FD3469FB700 320382 4 OFS D: run location: 0x402f0074 0x7FD3469FB700 320382 4 OFS D: memory page: 0 0x7FD3469FB700 320382 4 OFS D: offset in file: 116 or 0x74 0x7FD3469FB700 320382 4 OFS D: OFS LOAD Section added: name: padding 0x7FD3469FB700 320382 4 OFS D: size in bytes: 10444, or 0x28cc 0x7FD3469FB700 320382 4 OFS D: load location: 0x402f91c4 0x7FD3469FB700 320382 4 OFS D: run location: 0x402f91c4 0x7FD3469FB700 320382 4 OFS D: memory page: 0 0x7FD3469FB700 320382 4 OFS D: offset in file: 0 or 0x0
Therefore, think the problem is that the CCS 7.1 debugger is incorrectly reading the address of the sections to load from the bootloader.out ELF file. The build directory containing the bootloader.out file is attached. bootloader.zip
https://github.com/Chester-Gillon/AM3352-SOM-EVB_bare_metal/blob/b99ab552f96f4cab27094f9e5937e012725eee90/bootloader/targetConfigs/AM3352.ccxml is the target configuration file which was used when attempt to debug the bootloader.out. The target configuration uses custom GEL files on the Cortex-A8 and ICEpick_D, where the GEL files are in https://github.com/Chester-Gillon/AM3352-SOM-EVB_bare_metal/tree/b99ab552f96f4cab27094f9e5937e012725eee90/gel_files directory.