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CCS/TMS320F28055: no emulator connection

Part Number: TMS320F28055

Tool/software: Code Composer Studio

Hi,

I try to connect the emulator to a F28055 for the first time. The MCU has its 3.3V and a pulldown at M0 ( /TRST). For later runs (with software at the flash) we have pullups at M1 and M2. It is a simple single-processor project.

We use a Spectrum Digital XDS510 USB emulator. This is configured in CCS. The JTAG interface pins EMU0 and EMU1 are left open, as F028055 does not support this.

We have CSS 6.2.0.00050 at a WIN7 Pro 64bit computer.

When I try to connect, an error message appears:

Failed CPU Reset:
Error 0x20000024/-1137
Severe Error during: Register, Execution,
It appears that the target is being held in reset.  This may be
due to Wait-In-Reset (WIR) configuration set by the EMU 0/1 pin
settings.  If this is the case, press Cancel and disconnect all
connected devices to attempt to clear the WIR configuration.

I changed some settings in Connection Properties, but without result. I'm not familiar with that settings.

I observe that the emulator pulls M0 high and the red LED at the emulator is on, when trying to connect. I can see signals at JTAG pin 1 (TMS). It seems to be boosts that retry to connect.

I read SPRUE5C.PDF starting at page 215. There it says that when TRST=1, the boot mode will be choosen from the first two locations of PIE vector table, EMU_KEY and EMU_BMODE. But as I cannot connect, these locations are of factory setting.

I spent already several days on it, my colleagues can't help because the F28055 is new for us.

I appreciate every hint.

Kind regards,

Pablo

  • Pablo,

    I will try to get an expert to comment on this issue.

    I did find this document. www.ti.com/.../spraas1c.pdf

    In figure 7 it shows more information on the signals.

    Regards,
    John
  • Hi John,

    you don't need to search for an expert, I solved it meanwhile.

    We connected a pullup to XRS, but it was internally pulled down all the time.

    Then we discovered that we did not use the VDD (core voltage) correctly. We connected all VDDIO, VDD, VDDA to 3.3V, while VREGENZ pulled down. Later we read that when using internal VREG (only one supply source, 3.3V), we should connect VDD only with a capacitor to ground. At first, we let it open and it didn't work. With 2.2µF each it works fine. So it was a voltage supply error.

    Now I close the case, many thanks.

    Kind regards, P. Holtkamp