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CCS/TM4C1294NCPDT: Flashing elf file using LM Flash Programmer

Part Number: TM4C1294NCPDT
Other Parts Discussed in Thread: UNIFLASH, , SYSBIOS

Tool/software: Code Composer Studio

Hi Everyone,

Currently I'm working on external flash and RAM and able to successfully flash .bin file of TI compiler project but when i switch to GCC project , the output file .out (ELF32) cannot be flashed using this tool and if i convert to .bin format using objcopy , the generated bin file is 1GB in size (since ELF has memory gaps which is directly converted to BIN). Can anyone please help me on how i can convert to BIN format with memory compression which is compatible with LM Flash programmer.

Thanks in Advance.

Regards,

- Prajnith

  • Hi,
    Have you try to use Uniflash www.ti.com/.../uniflash to load your elf file directly?
  • Hi Charles,

    Yes i have tried to flash elf, converted hex and S19 files directly but no luck. Only when i run via debugger then the code executes

    -Prajnith
  • Hi Prajnith,
    i will move your post to the CCS forum where my colleagues there may be able to assist your question.
  • We have managed to fix the issue of large bin file but the bin file wont execute unless run through debugging mode. We have address Entry points as _c_int00 but it wont execute when micro is normally powered ON. How do we add Entry point and define an fixed address in lds linker file (gcc) ?

    Thanks

  • Prajnith Kumar said:
    We have managed to fix the issue of large bin file but the bin file wont execute unless run through debugging mode. We have address Entry points as _c_int00 but it wont execute when micro is normally powered ON.

    If the GCC ARM semihosting support is used the device won't successfully run outside of the debugger since the semihosting supports uses BKPT instructions which cause the device to halt unless a debugger is attached to resume the target after the breakpoint.

    Your program will be using semihosting support if has linked the rdimon library, which needs to be changed to the nosys library to allow the device to run outside of the debugger.

  • Hi Chester,

    Thank you, yes after disabling semi hosting this problem was resolved. Thanks again for the quick help and support. My next issue is I'm trying to execute from external flash, I have modified the linker and gel file to point to external flash but in the auto generated linker.cmd file it's still pointing to 0x00. I have created a separate thread for that but it's still unresolved. I tried wizard tool to modify the memory locations but un fortunately I observed that for m4 cortex and Tiva settings, the wizard tool won't allow to modify the memory layout, not sure what I'm doing wrong. Is there any other way we can modify the auto generated linker.cmd to point to epi address??

    Thanks again
    -Prajnith
  • Prajnith Kumar said:
    I have created a separate thread for that but it's still unresolved.

    Can you clarify if the problem is either:

    a) The program created using the GCC compiler doesn't run correctly from external EPI flash after being programmed to external flash via LM Flash programmer and TI bootloader.

    b) You can't download the program to external flash via the CCS debugger.

    If the problem is b) after writing the program to external flash via LM Flash programmer and TI bootloader, you can use the CCS debugger Manual Launch to debug the existing program in flash without the CCS debugger attempting to write to external flash. You will need the GEL function changes as per your other EK-TM4C129EXL: Debugging Firmware running on EPI flash thread in order to allow the CCS debugger to consider that the external flash is readable to the debugger.

    I don't believe the CCS debugger knows how to program external flash, although I don't have a Tiva board with external EPI flash to test it.

  • Hi Chester,

    Problem I face is, when I change the address of FLASH and RAM to EPI that is 0x60000000 and 0xA0000000 ( I donot remember the exact zero's) in linker(lsd) file and gel file and try to build I get error that flash and ram location are exceeding, if I look at the auto generated linker.cmd file the flash and sram location is still set to 0x00000000 and 0x20000000. I don't know how to make sure that linker.cmd file is pointing to same flash and sram location as the one I set in lsd (linker file) and gel file.
  • Prajnith Kumar said:
    Problem I face is, when I change the address of FLASH and RAM to EPI that is 0x60000000 and 0xA0000000 ( I donot remember the exact zero's) in linker(lsd) file and gel file and try to build I get error that flash and ram location are exceeding, if I look at the auto generated linker.cmd file the flash and sram location is still set to 0x00000000 and 0x20000000.

    I assume the mention of an auto-generated linker.cmd file means you are using a TI-RTOS or SYS/BIOS based project.

    I looked an example SYS/BIOS project for a TM4C1294NCPDT and the FLASH and SRAM memory regions are only specified in the TM4C1294NCPDT.lds file in the root directory of the project, and the FLASH and SRAM memory regions are NOT specified in the auto generated linker.cmd file.

    Can you post the complete project, or failing that the contents of the .cfg file?

    Also which version of SYS/BIOS or TI-RTOS are in use?

    On the available information not sure if something in the .cfg file is causing conflicting memory regions to be in added to the auto generated linker.cmd file.

  • Hi Chester,

    Yes you are correct its an TIRTOS/SYSBIOS project. I have attached an sample GCC project where the same overflow issue is observed.

    To give you the details about the tools

    Compiler : GNU 4.9.3

    TI-RTOS : 2.16.1.14

    XDC : 3.32.0.06

    Please find the error log below

    makefile:150: recipe for target 'gpiointerrupt_EK_TM4C129EXL_GNU_TivaTM4C129ENCPDT.out' failed
    c:/ti/ccsv7/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/../lib/gcc/arm-none-eabi/4.9.3/../../../../arm-none-eabi/bin/ld.exe: address 0x3c of gpiointerrupt_EK_TM4C129EXL_GNU_TivaTM4C129ENCPDT.out section `.intvecs' is not within region `FLASH'
    c:/ti/ccsv7/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/../lib/gcc/arm-none-eabi/4.9.3/../../../../arm-none-eabi/bin/ld.exe: gpiointerrupt_EK_TM4C129EXL_GNU_TivaTM4C129ENCPDT.out section `.text' will not fit in region `FLASH'
    c:/ti/ccsv7/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/../lib/gcc/arm-none-eabi/4.9.3/../../../../arm-none-eabi/bin/ld.exe: address 0x3c of gpiointerrupt_EK_TM4C129EXL_GNU_TivaTM4C129ENCPDT.out section `.intvecs' is not within region `FLASH'
    c:/ti/ccsv7/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/../lib/gcc/arm-none-eabi/4.9.3/../../../../arm-none-eabi/bin/ld.exe: address 0x3c of gpiointerrupt_EK_TM4C129EXL_GNU_TivaTM4C129ENCPDT.out section `.intvecs' is not within region `FLASH'
    c:/ti/ccsv7/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/../lib/gcc/arm-none-eabi/4.9.3/../../../../arm-none-eabi/bin/ld.exe: region `FLASH' overflowed by -1611749449 bytes
    collect2.exe: error: ld returned 1 exit status
    gmake[1]: *** [gpiointerrupt_EK_TM4C129EXL_GNU_TivaTM4C129ENCPDT.out] Error 1
    gmake: *** [all] Error 2
    makefile:146: recipe for target 'all' failed

    gpiointerrupt_EK_TM4C129EXL_GNU_TivaTM4C129ENCPDT.zip

  • Hi Chester,

    I added below listed lines of code in my cfg file and now able to execute my firmware in external flash, tried the same for SRAM but it ends up in generating large bin file, need to figure out how to fix that, i already have no load for .vtable but still it caused issue. Please let me know your thoughts

    Program.sectMap[".intvecs"] = new Program.SectionSpec();
    Program.sectMap[".intvecs"].loadAddress = 0x60020000;

    Program.sectMap["_intvecs_base_address"] = new Program.SectionSpec();
    Program.sectMap["_intvecs_base_address"].loadAddress = 0x6002003C;

    Thanks,
    -Prajnith
  • Hi All,

    Solved this issue

    below is my linker script and added few lines in cfg file as well

    /************ This is linker script ****************************/

    MEMORY
    {
    FLASH (RX) : ORIGIN = 0x6002003C, LENGTH = 0x00100000
    SRAM (WX) : ORIGIN = 0x20000000, LENGTH = 0x00040000
    XSRAM (WX) : ORIGIN = 0xA0000000, LENGTH = 0x00100000
    }

    REGION_ALIAS("REGION_TEXT", FLASH);
    REGION_ALIAS("REGION_BSS", XSRAM);
    REGION_ALIAS("VTABLE_REGION_DATA", SRAM);
    REGION_ALIAS("REGION_DATA", XSRAM);
    REGION_ALIAS("REGION_STACK", XSRAM);
    REGION_ALIAS("REGION_HEAP", XSRAM);
    REGION_ALIAS("REGION_ARM_EXIDX", FLASH);
    REGION_ALIAS("REGION_ARM_EXTAB", FLASH);

    SECTIONS {

    PROVIDE (_intvecs_base_address =
    DEFINED(_intvecs_base_address) ? _intvecs_base_address : 0x6002003C);


    .intvecs (0x60020000) : AT (0x60020000) {
    KEEP (*(.intvecs))
    } > REGION_TEXT

    PROVIDE (_vtable_base_address =
    DEFINED(_vtable_base_address) ? _vtable_base_address : 0x20000000);


    .vtable (_vtable_base_address) (NOLOAD) : {
    KEEP (*(.vtable))
    } > VTABLE_REGION_DATA

    .text : {
    CREATE_OBJECT_SYMBOLS
    *(.text)
    *(.text.*)
    . = ALIGN(0x4);
    KEEP (*(.ctors))
    . = ALIGN(0x4);
    KEEP (*(.dtors))
    . = ALIGN(0x4);
    __init_array_start = .;
    KEEP (*(.init_array*))
    __init_array_end = .;
    *(.init)
    *(.fini*)

    } > REGION_TEXT AT> REGION_TEXT

    PROVIDE (__etext = .);
    PROVIDE (_etext = .);
    PROVIDE (etext = .);

    .rodata : {
    *(.rodata)
    *(.rodata*)
    } > REGION_TEXT AT> REGION_TEXT

    .data : ALIGN (4) {
    __data_load__ = LOADADDR (.data);
    __data_start__ = .;
    *(.data)
    *(.data*)
    . = ALIGN (4);
    __data_end__ = .;
    } > REGION_DATA AT> REGION_TEXT

    .ARM.exidx : {
    __exidx_start = .;
    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
    __exidx_end = .;
    } > REGION_ARM_EXIDX AT> REGION_ARM_EXIDX

    .ARM.extab : {
    *(.ARM.extab* .gnu.linkonce.armextab.*)
    } > REGION_ARM_EXTAB AT> REGION_ARM_EXTAB

    .bss : {
    __bss_start__ = .;
    *(.shbss)
    *(.bss)
    *(.bss.*)
    *(COMMON)
    . = ALIGN (4);
    __bss_end__ = .;
    } > REGION_BSS AT> REGION_BSS

    .heap : {
    __heap_start__ = .;
    end = __heap_start__;
    _end = end;
    __end = end;
    KEEP(*(.heap))
    __heap_end__ = .;
    __HeapLimit = __heap_end__;
    } > REGION_HEAP AT> REGION_HEAP
    .stack (NOLOAD) : ALIGN(0x8) {
    _stack = .;
    __stack = .;
    KEEP(*(.stack))
    } > REGION_STACK AT> REGION_STACK

    }


    /************ End of linker script ****************************/



    /************** This is cfg section code - copy to cfg file**********/


    Program.sectMap[".intvecs"] = new Program.SectionSpec();
    Program.sectMap[".intvecs"].loadAddress = 0x60020000;

    Program.sectMap["_intvecs_base_address"] = new Program.SectionSpec();
    Program.sectMap["_intvecs_base_address"].loadAddress = 0x6002003C;





    Thanks
    - Prajnith