Compiler/TDA2EVM5777: Exception Handler For Cortex M4

Harshalkumar Shinde said:

159 GucNullcheck = GucNullcheck/0;

Since an attempt is made to divide by an integer constant zero the compiler doesn't perform the division, and stores a zero in the result (after generating a warning).

To force a division by zero make the divisor a volatile variable. The following code causes the compiler to generate UDIV instructions:

volatile unsigned int *const NVIC_CFG_CTRL = (volatile unsigned int *) 0xE000ED14;
#define DIV0_MASK 0x10

int main (void)
{
    volatile unsigned int GucNullcheck;
    volatile unsigned int zero_divisor = 0;

    /* Attempt to divide by zero without the trap enabled */
    *NVIC_CFG_CTRL &= ~DIV0_MASK;
    GucNullcheck = 10;
    GucNullcheck = GucNullcheck / zero_divisor;

    /* Attempt to divide by zero with the trap enabled */
    *NVIC_CFG_CTRL |= DIV0_MASK;
    GucNullcheck = 12;
    GucNullcheck = GucNullcheck / zero_divisor;

    return 0;
}

The code also causes the 2nd divide to zero to generate a Divide-by-Zero Usage Fault, by writing to the NVIC Configuration and Control Register.

Tested in a TM4C1294NCPDT Cortex-M4F device.

Hello Chester Gillon,

Thanks for the reply.

First point remain to discuss. Is their any way that generate Trap while reading Null pointer.

Thanks,

Harshalkumar Shinde 

Harshalkumar Shinde said:

Is their any way that generate Trap while reading Null pointer.

In the Cortex-M4 architecture there is no built-in exception mechanism to trap reading a "Null pointer".

Implementing a Null pointer de-reference trap involves generating an exception if the software attempts to read or write in the "lowest region" of address space; A NULL pointer is zero but if an attempt is made to re-reference a NULL pointer for a structure the attempted access may be at an address greater than zero.

The ability to implement a Null pointer de-reference trap depends upon the memory map for the device in that:

a) The memory map at address zero needs to be something the application has no need to read or write to.

b) The memory map at address can be configured to generate an exception when attempted to be accessed by software.

In your Cortex-M4 what is the memory map at address zero?