stack pointer initialization on arm926

Hi

if you are still looking for some more information. Yes it is in the programmer's responsibility to initialize other stacks but you need to be carefully not setting them on the same location. The SP pointer is physically a different register. If you would set them all to the same start point in Memory you would overwrite content on a different mode !!  

Have a look at the ARM support side:

http://infocenter.arm.com/help/index.jsp and the AppNote 107 !

There are some examples how to set up the stack from different modes. There is example code as well. let me know if you need more.

Regards

Jens

Hello,

I set up the stack pointer for each mode at the beginning of main, where I change to svc-mode via swi instruction. Once in svc-mode I set up the svc-stack at the location of the beginning of the user stack minus user stack size (e.g. user stack size 0x1000 at location 0x8000). So the svc-stack is at 0x7000. Then change to fiq mode, set up the fiq-stack to svc-stack minus 0x200 (stack size of my svc-stack). So fiq-stack is at 0x6e00. The same procedure for the other stacks. After changing to the svc-mode again, I exit the swi-routine to change to user mode again. Now I have set up all stacks. I hope, this is works fine. I'm trying to put the code to the boot.asm file and compile it to the run time support library, so that the stacks should be initialized at reset. If anyone has a better way to do the stack initialisation, I'm interested!

Regards

Hi

That sounds fine to me. But you may want to consider to make that part of the reset handler. When the core comes out of reset it will be in SVC (Supervisor) mode anyway.

You may what to set up the rest of the CPSR for that mode as well. I am thinking of the FIQ and the IRQ.

See some example code below:

; --- Amount of memory (in bytes) allocated for stacks

Len_FIQ_Stack    EQU     256

Len_IRQ_Stack    EQU     256

…

Offset_FIQ_Stack         EQU     0

Offset_IRQ_Stack         EQU     Offset_FIQ_Stack + Len_FIQ_Stack

…

Reset_Handler

        LDR     r0, stack_base ; located by scatter file

; Enter each mode in turn and set up the stack pointer

        MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit ; No interrupts

        SUB     sp, r0, #Offset_FIQ_Stack

        MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit ; No interrupts

        SUB     sp, r0, #Offset_IRQ_Stack

        …

; System mode stack is set up last

        MSR     CPSR_c, #Mode_SYS:OR:I_Bit:OR:F_Bit ; No interrupts

        SUB     sp, r0, #Offset_SYS_Stack

; Set up stack limit if needed

        LDR     r10, stack_limit ; located by scatter file        

Please remember that the System mode makes use the same register as the user mode!! So no need to set up the SP again !!

Regards 

Jens