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CCS/TCI6630K2L: Hardware watch point is not working "CCS v7.1"

Part Number: TCI6630K2L

Tool/software: Code Composer Studio

Hi,

I was debugging a crash "Instruction fetch exception".

In debugging process I found that, there was a function pointer present in structure got corrupted. The issue was 100 % reproducible & the address for corruption was always same.

So I thought to attach a hardware watch point using CCS v7.1 at the same address. 

I reproduced that issue several time but the watch point never hit. I tried sw breakpoint also, but it also didn't work.

Then I tried count access on write at the same address, it shows increment in count but no hit "watch point or breakpoint".

In further debugging I found that the issue was cause because of Task_sleep called by main function, which corrupting memory, but still I am not able to understand why HW watch point didn't work.

Can you please help me to understand, why the HW watch point didn't work.

Thanks & Regards

Gautam Shah

  • Gautam,

    Ideally a testcase that reproduces the issue would be helpful. However, I would like to ask: does a hardware watchpoint work prior to the point of failure?

    The reason is that I suspect that either the device is being reset (which would clear any HW breakpoints) or the memory corruption would overwrite the RAM where the SW breakpoint was set. Both scenarios would prevent a target halt/watch.

    If the watchpoint does not work in a normal running code, then the issue may be CCS itself.

    At last: does this occur on the ARM or the C66x cores? The ARM cores have specific halt on Exception checkboxes that can be useful. Go to menu Tools --> ARM Advanced Features.

    Regards,
    Rafael
  • Dear Rafael,

    Thanks for your response.

    I have rechecked the issue scenario and found that, yes device got reset when issue was happened.

    CCS console logs are as

    C66xx_3: Trouble Reading Memory Block at 0xde0f9b48 on Page 0 of Length 0x4: (Error -1137 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 6.0.628.1)
    C66xx_3: Trouble Halting Target CPU: (Error -1060 @ 0x0) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.628.1)

    Please find Exception error logs for core3 as an attachment  for the same.

    My test env. & steps are as

    1)Attach CCS 7.1 to core3 with enabling real-time mode.

    2)Used asm (" swbp 0"); as first instruction in main function to halt core3 at start-up.

    3)After halt of core3 due to step 2, create HW, SW & data count access breakpoint for core 3 for specific memory location.

    4)Resume core3 process after successful execution of step 3.

    Issue reproduce but core 3 got rest.

    Can you please let me know how I can avoid this cor3 rest process so that my HW breakpoint will work.

    Thanks & Regards

    Gautam Shah

    2 Resource entries at 0x800000
    Core:3:Cache Mar Settings.....
    Debug: RM Startup was successful
    L2Debug: Waiting for NamedResource TICore0InitDone
    L2Debug:Named Resource TICore0InitDone found
    NetFpTx Heap created and found Proceeding with creation of heaps in core-3
    Debug: lteL2FapiTracingHeap (0xc03b600) has been created
    Debug: TiFapi_UlschDataHeap (0xc03b680) has been created
    Debug: TiFapi_DlTxTracingHeap (0x803a30) has been created
    Debug: lteL2DLULSplitHeap (0xc03b800) has been created
    Debug: lteL2MacDlTxPktlibHeap (0xc03b900) has been created
    Debug: netfpHeaderHeap (0x803ab0) has been created
    Debug: netfpFragmentHeap (0x803b30) has been created
    Debug: DSP ARM Heap (0xc03b980) has been created of size 11264
    Debug: Core3 Agent Heap (0x803bb0) has been created of size 1024
    
    ---------------------------------------------------------- 
     L2Debug: ARICENT Layer-2 Stack Successfully Initialized 
     L2Debug: Release Version TI_LTE_REL5_L23_BL061
     FAPI Version: 1.8 
     FAPI_NUM_DL_USERS: 8 
     FAPI_NUM_UL_USERS: 8 
     FAPI_NUM_OF_SRS: 16 
    ---------------------------------------------------------- 
    Debug: [Enabling] Accumulated Queue 707 -> Event Id 48
    L2Debug: FAPI Rx SF Messages will be sent to Queue 0x2c3
    L2Debug: FAPI Rx NonSF Messages will be sent to Queue 0x442
    Debug: [Enabling] Accumulated Queue 723 -> Event Id 52
    Debug: Physical Channel 0x@0c03c800 has been created
    EVM MAC Address: 20:c3:8f:1d:69:94
    NETFP_CmdHeap heap found successfully 
    lteL2NetfpRxHeap heap found successfully 
    NetfpSaUsageHeap heap found successfully 
    lteL2UIATransportHeap heap found successfully 
    netfpData1KTxHeap heap found successfully 
    netfpData2KTxHeap heap found successfully 
    netfpDataTxHeap heap found successfully 
    lteL2FapiTracingHeap heap found successfully 
    TiFapi_UlschDataHeap heap found successfully 
    lteL2DLULSplitHeap heap found successfully 
    lteL2MacDlTxPktlibHeap heap found successfully 
    NETFP_ReassemblyRxHeap heap found successfully 
    Debug: Fast Path Flow[Ltel2-UDP-Control-Flow] Handle 0x@a0622600
    Debug: [Enabling] Accumulated Queue 715 -> Event Id 50
    Debug: Netfp-Data-Control-Rx-Channel Matching Packets will be sent to Queue 0x2cb
    Debug: Netfp-Control-Fail-Channel Non-Matched Packets will be sent to Queue 0x446
    Debug: [Enabling] Accumulated Queue 719 -> Event Id 51
    Debug: DRB_CIPHERING_CHANNEL_NAME Matching Packets will be sent to Queue 0x2cf
    Debug: NETFP has been setup successfully
    L2 Debug: TI_FAPI_MSG_HEAP_DDR_NAME heap found successfully 
    L2 Debug: TI_FAPI_MSG_HEAP_MSMC_NAME heap found successfully 
    L2 Debug: TI_FAPI_CELL0_L2L1_HP_CHANNEL_NAME found Successfully
    TI_FAPI_CELL0_L2L1_LP_CHANNEL_NAME found Successfully
    L2 Debug: Shared Msgcom Channels and Heaps detected successfully
    Debug: Trace library initialized successfully for core 3.
    Debug: creating Core:3:contract:UIA_CONTRACT_LOG_CORE3
    Debug: Contract created successfully for contract UIA_CONTRACT_LOG_CORE3; Handle @a02f7000.
    A0=0x0 A1=0x0
    A2=0x0 A3=0xddddab7c
    A4=0xde0f9b48 A5=0xde0f3ce0
    A6=0x805e A7=0x48b7b900
    A8=0xc60ba47 A9=0xde15e124
    A10=0xdd2ee0f4 A11=0x1
    A12=0x1 A13=0xde0f9b48
    A14=0x805e A15=0x8fff00
    A16=0xdc466c64 A17=0x0
    A18=0xdc465b80 A19=0xdc466c5c
    A20=0x110 A21=0x60000004
    A22=0x60000000 A23=0xdc466c50
    A24=0x20 A25=0x580
    A26=0x20 A27=0xdc466c54
    A28=0xde15e1a4 A29=0xdc466b90
    A30=0xde15e120 A31=0xa02ec000
    B0=0x0 B1=0x1
    B2=0xa02f7480 B3=0xa542a500
    B4=0x31938000 B5=0x298
    B6=0x1 B7=0x1
    B8=0x0 B9=0xde0f9bb8
    B10=0x101 B11=0x31938000
    B12=0x48b7b900 B13=0x4757b33f
    B14=0xde1605a8 B15=0xde15e038
    B16=0x0 B17=0x0
    B18=0x8b4 B19=0x0
    B20=0x0 B21=0x69
    B22=0xffffffff B23=0xfffffff7
    B24=0xde15e178 B25=0x100
    B26=0x580 B27=0xde15e170
    B28=0x84 B29=0x1014
    B30=0x104 B31=0x1638
    NTSR=0x1000c
    ITSR=0x0
    IRP=0x0
    SSR=0x0
    AMR=0x0
    RILC=0x0
    ILC=0x0
    Exception at 0x298
    EFR=0x2 NRP=0x298
    fault_mgmt_biosExceptionHook
    Internal exception: IERR=0x1
    Instruction fetch exception
    fault_mgmt_biosExceptionInternalHook
    A0=0x0 A1=0x0
    A2=0x0 A3=0xddddab7c
    A4=0xde0f9b48 A5=0xde0f3ce0
    A6=0x805e A7=0x48b7b900
    A8=0xc60ba47 A9=0xde15e124
    A10=0xdd2ee0f4 A11=0x1
    A12=0x1 A13=0xde0f9b48
    A14=0x805e A15=0x8fff00
    A16=0xdc466c64 A17=0x0
    A18=0xdc465b80 A19=0xdc466c5c
    A20=0x110 A21=0x60000004
    A22=0x60000000 A23=0xdc466c50
    A24=0x20 A25=0x580
    A26=0x20 A27=0xdc466c54
    A28=0xde15e1a4 A29=0xdc466b90
    A30=0xde15e120 A31=0xa02ec000
    B0=0x0 B1=0x1
    B2=0xa02f7480 B3=0xa542a500
    B4=0x31938000 B5=0x298
    B6=0x1 B7=0x1
    B8=0x0 B9=0xde0f9bb8
    B10=0x101 B11=0x31938000
    B12=0x48b7b900 B13=0x4757b33f
    B14=0xde1605a8 B15=0xde15e038
    B16=0x0 B17=0x0
    B18=0x8b4 B19=0x0
    B20=0x0 B21=0x69
    B22=0xffffffff B23=0xfffffff7
    B24=0xde15e178 B25=0x100
    B26=0x580 B27=0xde15e170
    B28=0x84 B29=0x1014
    B30=0x104 B31=0x1638
    NTSR=0x1000c
    ITSR=0x0
    IRP=0x0
    SSR=0x0
    AMR=0x0
    RILC=0x0
    ILC=0x0
    Internal exception: IERR=0x1
    NRP=0x298
    Instruction fetch exception
    Enter fault_mgmt_biosExceptionAbortHook
    

     

  • Gautam,

    Please apologize for missing your reply; are you still having this issue?

    I tried to reproduce the issue here but I was having trouble with my K2L board and I couldn't yet make it work properly.

    Regards,
    Rafael
  • Dear Rafael,

    Thanks for your response. 

    Yes, the evm reset still happens when HW breakpoint hit. 

    Thanks & Regards

    Gautam Shah

  • Gautam,

    I was able to put my 66AK2L board to run but I don't think I can reproduce this issue. I tried to do some tests with breakpoints but I don't think the target missed any. 

    Please check the short clip below with the procedure I followed - perhaps I missed something from your original procedure?

    There is a load warning but it is expected when Real-time mode is active. 

    Regards,

    Rafael