Compiler/TDA2EX17EVM: Hi i am trying write 0x8B000000 location my stack but it is writing only two byte address when function execution.

Does the stack get allocated to the address 0x8B000000?  I don't see how it could be allocated to a different address.

kiran vidhate said:

I have tried to write on stack at time function switching it will stroe only two byte of address.

I presume you somehow try to write 4-bytes to the top of the stack, but only 2 bytes get written.  Is that correct?  Exactly how is this write implemented?

Thanks and regards,

-George

Hi,

for  MPU_A15 i have put location  OCMCRAM1      : org = 0x40300000,  len = 0x00080000  /* OCMC RAM1        */ for pdk example but my code  it was taking 0x40378000 .then  i have required stack for  handling some storage. i was increase the size of        GEL_MapAddStr(0x40300000, 0, 0x00100000, "R|W|AS4", 0);     /* OCMRAM1 -  */ file  it  not allow to write 0x40380000  location i want some stack area around 32-64k .which suitable location .or how to change in gel file get to allow more code area? or any location is there i will use stack area.I am using sample B1 board .

Previous i was tried to write EVM for  0x8B000000 it will work fine.

please suggest increase size of 0x40300000 for A15.

 

Hi,

From what I understood from your post, you want information about:
(1) where to allocate your stack area or
(2) how to modify the debugger config file (GEL) to add more memory

I can tell upfront that (2) is completely dependent on the hardware, thus impossible to solve by means of a simple configuration file.

Therefore (1) is your only alternative. The original allocation of the memory region STACK_RAM to 0x8B000000 is only dependent if the external DDR memory is properly initialized. Since this initialization is completely dependent on the hardware present on the board, I suspect that your sample B1 board may either be faulty or require a different DDR memory initialization routine - especially because you reported that the EVM works fine.

A few useful tests to find out if the DDR memory is failing are shown at the section "Diagnosing RAM Problems" of the Troubleshooting page below.

dev.ti.com/.../

Please let me know if you meant something else.

Hope this helps,
Rafael

hi,

Please share your mail id. i will send u .map ,linker file .Is there any setting in css to erase memory or change alignment of memory.

Regards,

Kiran

Kiran,

>>Is there any setting in css to erase memory or change alignment of memory.

I can't understand what you mean by "css to erase memory" - CCS will always overwrite the memory segments that are used by your code and data when the .out file is loaded to the target.

Regarding the memory alignment, I can see that your syntax seems correct - it matches the linker script files provided with CCS for the Sitara and Keystone II devices (I send it attached for your evaluation).

I really don't think I can contribute much else but I will send you a private message, so you can send your files.

Regards,

Rafael

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