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CCS/TMS320C5517: Incorrect addresses in memory mapped registers?

Part Number: TMS320C5517

Tool/software: Code Composer Studio

Hello.

Working on a project that was ported from a 5535 to the 5517. This might be part of the problem, but I have set it up correctly for the C5517, I believe.

When right clicking in the Register window and choosing "View Memory at Address" while debugging Timer 0, the addresses are shown to be 0x1800 to 0x1806. The datasheet says the registers are at 0x1810 to 0x1816, which are also the ones that actually work. All of the timer (0x18xx) registers are off by 0x10, it seems.

So CCS has a wrong idea about where the timer registers actually are. Is there a configuration somewhere where I can change that?

Best regards

  • Hi,

    Thanks for reporting this. The base addresses of the TIMERn registers is defined in the Device XML file below and match the device's datasheet (page 156).
    File: ccs_base/common/targetdb/devices/C5517.xml

    The registers actually start with an offset of 0x10 in relation to the base address. This offset is defined in the Modules XML file for the peripheral.
    File: ccs_base/common/targetdb/Modules/C5517/cslr_timer.xml

    Given the Modules file is used in all three timers, I could see they are actually pointing to invalid locations in Timer1 and Timer2 as well.

    The quick fix is to simply modify the offset directive of each register in the cslr_timer.xml file in your current setup.

    I will repair that and post it as a CCS update earlier next week.

    I apologize for the inconvenience,
    Rafael
  • Hi,

    Last week I made available the C5000 Device support version 1.1.9 that contain this fix. Please check for updates from inside CCS.

    If you run into issues, you can always install it separately from the page below.
    processors.wiki.ti.com/.../Device_support_files

    Hope this helps,
    Rafael