Part Number: CC3220
Tool/software: TI C/C++ Compiler
Hey gurus,
I am trying to rearrange my linker file to allow me to run certain parts of my library from RAM. Below is what my .cmd looks like:
/*
* ======== CC3220SF_LAUNCHXL.cmd ========
*/
/*
* The starting address of the application. Normally the interrupt vectors
* must be located at the beginning of the application.
*/
#define SRAM_BASE 0x20000000
#define FLASH_BASE 0x01000800
-lopuslib.lib
--stack_size=4096 /*C stack is also used for ISR stack */
HEAPSIZE = 120000; /* Size of heap buffer used by HeapMem */
MEMORY
{
/* Bootloader uses FLASH_HDR during initialization */
FLASH_HDR (RWX) : origin = 0x01000000, length = 0x7FF /* 2 KB */
FLASH (RWX) : origin = 0x01000800, length = 0x0FF800 /* 1022KB */
SRAM (RWX) : origin = 0x20000000, length = 0x00040000 /*256KB 40000*/
}
/* Section allocation in memory */
SECTIONS
{
.dbghdr : > FLASH_HDR
.textetc : > FLASH
{
opuslib.lib<celt_encoder.obj>(.text)
opuslib.lib<opus_encoder.obj>(.text)
opuslib.lib<bands.obj>(.text)
}
.textlib : > SRAM
{
opuslib.lib(.text)
opuslib.lib(.data)
}
.text : > FLASH
.TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
.const : > FLASH
.cinit : > FLASH
.pinit : > FLASH
.init_array : > FLASH
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
/* Heap buffer used by HeapMem */
.priheap : {
__primary_heap_start__ = .;
. += HEAPSIZE;
__primary_heap_end__ = .;
} > SRAM(HIGH) align 8
.stack : > SRAM(HIGH)
}
I notice when i do this, the map file looks to be correct, but my .bin doubles in size! this causes me to be unable to flash the device.
Is there anything I am missing when configuring my .cmd file so that the .bin generates correctly?
Thanks,
