CCS/UCD3138A: How to eliminate warning: section .const was padded by 2?

Dana Huang

Part Number: UCD3138A

Tool/software: Code Composer Studio

Hello. TI guys

I built my project and there is always a warning. How can I eliminate it?

'Invoking: ARM Hex Utility'
"C:/ti/ccs720/ccsv7/tools/compiler/ti-cgt-arm_5.2.5/bin/armhex" --intel -o "64T_PWR_Discrete_HSFB_20180412.hex" "64T_PWR_Discrete_HSFB_20180412.out"
Translating to Intel format...
   "64T_PWR_Discrete_HSFB_20180412.out" .vectors ==> .vectors
   "64T_PWR_Discrete_HSFB_20180412.out" .text ==> .text
   "64T_PWR_Discrete_HSFB_20180412.out" .const ==> .const
   "64T_PWR_Discrete_HSFB_20180412.out" .zero_out_integrity_word ==> .zero_out_integrity_word
   "64T_PWR_Discrete_HSFB_20180412.out" .CONFIG ==> .CONFIG
warning: section 64T_PWR_Discrete_HSFB_20180412.out(.const) was padded by 2 to
   a size of 808 to satisfy the specified memory width of 4
'Finished building: 64T_PWR_Discrete_HSFB_20180412.hex'

Here is my Linkfile

    .fiq            : {} > 0x001C                    /* Fast Interrupt Handler            */
    .text           : {} > (PFLASH align(16))        /* Code                              */
    .const          : {} > (PFLASH align(16))        /* Constant data                     */
    .cinit          : {} > (PFLASH align(16))        /* Initialization tables             */
     FixedDeviceID : {} > (DEVICEID)                /* Fixed location for Device ID      */
     FixedTfaStep   : {} > FIXTFA                    /* Fixed location TFA Step Size      */
     FixedConstants : {} > FIXCONST                  /* Fixed location constants          */
    .flashi         : {} > FLASHSUM                  /* PFlash Integrity Word             */

Dana

over 8 years ago

0 George Mock over 8 years ago

TI__Guru**** 253590 points

While it depends on what happens next with the .hex file, it is likely you can ignore that warning. By default on an ARM executable, the memory width is 32-bits, or 4 bytes. The length of the .const section must be 806 bytes. So, an additional two bytes of 0 is added to the end of the hex output for .const.

If this really concerns you, then you can arrange for the padding to be added during the link. For the .const line in the link command file, change the align to palign. The palign directive does the same alignment as align, but it additionally pads the section out to that number of bytes. This ends up wasting a few bytes, which may or may not be of concern.

Regarding your hex command, I want to point out something you might be overlooking ... The default ROM width of the --intel option is 8 bits, or 1 byte. This means you are not getting a single output file, but 4 output files. The first one is named 64T_PWR_Discrete_HSFB_20180412.hex. But the rest are named 64T_PWR_Discrete_HSFB_20180412.i1, 64T_PWR_Discrete_HSFB_20180412.i2, and 64T_PWR_Discrete_HSFB_20180412.i3. I'm pretty sure you don't want that. To avoid it, make the ROM width match the memory width by adding the option --romwidth=32.

Thanks and regards,

-George

0 Dana Huang over 8 years ago in reply to George Mock

Prodigy 230 points

Hi. George

Thanks for your help. It does work that I change the align to palign. But another problem: Is there any impact that some bytes are padded with unknown values? I am worry about that it will affect the regular operation.

BR
Dana

0 George Mock over 8 years ago in reply to Dana Huang

TI__Guru**** 253590 points

Dana Huang said:
Is there any impact that some bytes are padded with unknown values?

No. Please read more about it in the section titled Alignment With Padding in the ARM assembly tools manual.

Thanks and regards,

-George

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CCS/UCD3138A: How to eliminate warning: section .const was padded by 2?