Tool/software: TI C/C++ Compiler
My linker directives specify that global initialized data is loaded in flash, but is accessed (run) from L0 SARAM. However, the linker is assigning the L0 SARAM address to the specified LOAD address which should be in flash.
Below is the output redacted from the link map:
address name
-------------- -------
00008000 _APP_DATA_LOAD
00008000 _APP_DATA_RUN
0000045a _APP_DATA_SIZE
Corresponding linker directives:
MEMORY
{
PAGE 0:
APP_ROM: origin = 0x300320, length = 0xA500
PAGE 1:
APP_RAM: origin = 0x008000, length = 0x4000
}
SECTIONS
{
GROUP (GLOBAL_STATIC_INIT_DATA)
{
.data :
.ebss :
} LOAD = APP_ROM, PAGE = 0,
RUN = APP_RAM, PAGE = 1,
LOAD_START(_APP_DATA_LOAD),
RUN_START(_APP_DATA_RUN),
RUN_SIZE(_APP_DATA_SIZE)
}