I am getting different CLK high resolution timer results depending on whether the code runs on the emulator hardware, or various "cycle accurate" simulators.
ccs 4.1.2.00027, DSP/BIOS 5.41.02.14, c6748 300 MHz
I setup a simple 20ms PRD then run statistics using the CLK high resolution timer.
When I run on the emulator hardware I get 6,000,000 ticks between interrupts which is exactly what you would expect.
When I run on the C6747 Device Cycle Accurate SImulkator I get 3,000,000 ticks between interrupts.
When I run on the C674x Cycle Accurate SImulator I get 3,857,371 ticks between interrupts.
All three sources return 300,000 ticks per ms when I call CLK_countspms(). Obviously at least one of them is wrong...
