Compiler/TMS320C6416: 6416 compiler errors

Krishna Vallabhaneni

Intellectual 390 points

Part Number: TMS320C6416

Tool/software: TI C/C++ Compiler

This file and project built previously most recently on 10/1

Compiler version 6.0.1, CCs v7.2

There is nothing wrong with the statements. Why do the errors show up?

; .sect ".data2"
.align  4
.WORD  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
CRCTBLE:
    .loop 256
.word  0
.endloop

.text
LFIFO:
.loop  64
.word  0
.endloop

SQTBL:
.loop   256
.byte  0
.endloop


.end

{MainDualA-DR3.sa}
"C:/Users/kvallabhaneni/Desktop/HDL2_VF9_cat-hallfailtest-release/MainDualA-DR3.sa", ERROR!   at line 974:
         No matching .loop specified outside .(c)proc
  .endloop

"C:/Users/kvallabhaneni/Desktop/HDL2_VF9_cat-hallfailtest-release/MainDualA-DR3.sa", ERROR!   at line 982:
         No matching .loop specified outside .(c)proc
  .endloop

"C:/Users/kvallabhaneni/Desktop/HDL2_VF9_cat-hallfailtest-release/MainDualA-DR3.sa", ERROR!   at line 987:
         No matching .loop specified outside .(c)proc
  .endloop

"C:/Users/kvallabhaneni/Desktop/HDL2_VF9_cat-hallfailtest-release/MainDualA-DR3.sa", WARNING! at EOF: Open block(s) at EOF

Errors in Source - No output file generated

>> Compilation failure
makefile:166: recipe for target 'CRC-iniFordt.obj' failed
gmake: *** [CRC-iniFordt.obj] Error 1
gmake: Target 'all' not remade because of errors.ti_compiler.docx

over 7 years ago

0 George Mock over 7 years ago

TI__Guru**** 253190 points

To understand what happened, I need to reproduce the same error. And for that, I need you to send in a test case.

Please copy-n-paste, from the Console view, the build command for the file MainDualA-DR3.sa.

Please attach MainDualA-DR3.sa to your next post. So the forum will accept it, please add the file extension ".txt" to it.

Krishna Vallabhaneni said:
Compiler version 6.0.1

That version of the compiler is about 12 years old. I highly recommend you consider an upgrade.

Thanks and regards,

-George

0 Krishna Vallabhaneni over 7 years ago in reply to George Mock

Intellectual 390 points

Fullscreen MainDualA-DR3.sa.txt Download

	;B4 IS NUMBER OF BYTES?
	;A4 IS STARTING ADDRESS
  
CACHELOAD1        .macro		;AA,BB		;AA IS STARTING ADDRESS, BB IS NUMBER BYTES
        
   
        MVK			CRCTBLE,A12
        LDW			*A12[-1],A4 
        NOP			4
	 SUB			A4,1,A4
	 AND			A4,7,A4
	 SHL			A4,14,A4
        MVKB			0x50000,A5
        ADD			A5,A4,A4 
        MVK			0xE00,B4

        B       	.S2     CHloop?                    	; Pipe up the loop
	||MVK     	.S1     128,A5              		; Step by two cache lines
	||ADDAW   	.D2     B4,31,B4      			; Round up # of iters

        B       	.S2     CHloop?                    	; Pipe up the loop
	||CLR     	.S1     A4,0,6,A4      			; Align to cache line
	||MV      	.L2X    A4,B0              		; Twin the pointer

        B       	.S1     CHloop?                    	; Pipe up the loop
	||CLR     	.S2     B0,0,6,B0      			; Align to cache line
	||MV      	.L2X    A5,B2              		; Twin the stepping constant

        B       	.S2     CHloop?                    	; Pipe up the loop
	||SHR     	.S1X    B4,7,A1      			; Divide by 128 bytes
	||ADDAW   	.D2     B0,17,B0      			; Offset by one line + one word

   	[A1]BDEC    	.S1     CHloop?,A1              		; Step by 128s through array
	||[A1] LDBU    	.D1T1   *A4++[A5],A3      		; Load from [128*i +  0]
	||[A1] LDBU    	.D2T2   *B0++[B2],B4      		; Load from [128*i + 68]
	||SUB     	.L1     A1,7,A0

CHloop?:
   	[A0]BDEC    	.S1     CHloop?,A0              		; Step by 128s through array
	||[A1] LDBU    	.D1T1   *A4++[A5],A3      		; Load from [128*i +  0]
	||[A1] LDBU    	.D2T2   *B0++[B2],B4      		; Load from [128*i + 68]
	||[A1] SUB     	.L1     A1,1,A1

    	.endm
CACHELOAD2        .macro		;AA,BB		;AA IS STARTING ADDRESS, BB IS NUMBER BYTES
        
   
        MVK			CRCTBLE,A12
        LDW			*A12[-1],A4 
        NOP			4
	 SUB			A4,1,A4
	 AND			A4,7,A4
	 SHL			A4,14,A4
        MVKB			0x52000,A5
        ADD			A5,A4,A4 
        MVK			0xE00,B4

        B       	.S2     CHloop?                    	; Pipe up the loop
	||MVK     	.S1     128,A5              		; Step by two cache lines
	||ADDAW   	.D2     B4,31,B4      			; Round up # of iters

        B       	.S2     CHloop?                    	; Pipe up the loop
	||CLR     	.S1     A4,0,6,A4      			; Align to cache line
	||MV      	.L2X    A4,B0              		; Twin the pointer

        B       	.S1     CHloop?                    	; Pipe up the loop
	||CLR     	.S2     B0,0,6,B0      			; Align to cache line
	||MV      	.L2X    A5,B2              		; Twin the stepping constant

        B       	.S2     CHloop?                    	; Pipe up the loop
	||SHR     	.S1X    B4,7,A1      			; Divide by 128 bytes
	||ADDAW   	.D2     B0,17,B0      			; Offset by one line + one word

   	[A1]BDEC    	.S1     CHloop?,A1              		; Step by 128s through array
	||[A1] LDBU    	.D1T1   *A4++[A5],A3      		; Load from [128*i +  0]
	||[A1] LDBU    	.D2T2   *B0++[B2],B4      		; Load from [128*i + 68]
	||SUB     	.L1     A1,7,A0

CHloop?:
   	[A0]BDEC    	.S1     CHloop?,A0              		; Step by 128s through array
	||[A1] LDBU    	.D1T1   *A4++[A5],A3      		; Load from [128*i +  0]
	||[A1] LDBU    	.D2T2   *B0++[B2],B4      		; Load from [128*i + 68]
	||[A1] SUB     	.L1     A1,1,A1

    	.endm
;**************************************


MAINTOP:
	.def 	TOP  
	.DEF	CALDATA
	.sect	".main"
	.include "Tms6416.h" 
	.include "Macros.h"  
	.ref	CLEARREG 
       .ref	RUNMOTOR 
       .ref	PHY  
       .ref	LDLASER  
       .ref	INITCRC   
       .ref	SETADC  
       .ref	SERIAL
       .ref	READSEND6 
       .ref	MOTTBLE  
       .ref	MOTDATA
       .def	READRET 
       .def	POWERORD
	.ref	SYNCDMA
	.DEF	LFIFO
	.def	POWERORD2
   
     
	BNOP	TOP,5
DATST:	
	.word	12,PQAR0
	.word	15,PQAR1
	.word	6,PQAR2
	.word	1,L2ALLOC1
	.word	2,L2ALLOC2
       .word	0x000000B0,EMIFB_CE0  ; 16 BIT SYNC MEM   
       .word	0x30f003B3,EMIFB_CE3  ; 16 BIT SYNC MEM   
       .word	0x000000B0,EMIFB_CE2 
       .word	01100010B,EMIFB_CESEC0  
       .word	01110000B,EMIFB_CESEC2
       .word	01110010B,EMIFB_CESEC3 
       .word 	000000000001b,TIMER0_CTRL
       .word 	000000000001b,TIMER1_CTRL 
       .word 	000000000001b,TIMER2_CTRL
	.word	4,TIMER0_PRD
	.word	375,TIMER1_PRD					 ;was 333 
	.word	375,TIMER2_PRD 					;400 = 250 khz
	.word	0x50000,EMIFB_GCR
	.word	1000000000000000b,GPVAL
	.word	1111111111111111b,GPDIR

	.word	00000000000000000000000000000000b,McBSP0_SPCR   		;enable receive
	.word	0000101100000001b,McBSP0_PCR  
	.word	10000000001000000b,McBSP0_RCR  
	.word	10000000001000000b,McBSP0_XCR
	.word	0x20000000+ 24,McBSP0_SRGR     		;19,200baud ;WAS 200
       .word	00000000110000010000000000000001b,McBSP0_SPCR

	.word	0000101000001110b,McBSP1_PCR  
	.word	0000000001100000b,McBSP1_RCR  
	.word	10000000010100000b,McBSP1_XCR 
	.word	0x20001203,McBSP1_SRGR
	.word	00000000000000000001100000000000b,McBSP1_SPCR   		;enable receive
	.word	00000000010000000001100000000000b,McBSP1_SPCR                   ;grst ot of reset, now wait  

	.word	0001101100001110b,McBSP2_PCR  
	.word	0000000001100000b,McBSP2_RCR  
	.word	10000000010000000b,McBSP2_XCR 
	.word	0x20001210,McBSP2_SRGR
	.word	00000000000000000001100000000000b,McBSP2_SPCR   		;enable receive
	.word	00000000010000000001100000000000b,McBSP2_SPCR                   ;grst ot of reset, now wait

	.word	0xFFFF,GPEN   				;MAKE FFFFh TO SHUT OFF CLCKOUT	.word	0011100000000000b,McBSP0_PCR   ;KEEP VSYNC LOW
 
       .word   001111000001b,TIMER0_CTRL   		; START TIMER 
       .word   001111000011b,TIMER1_CTRL   		; START TIMER                      	
       .word   001111000011b,TIMER2_CTRL   		; START TIMER     
       .word	140,TIMER1_COUNT				;GIVE IT A HEAD START    ;WAS 140
       .word	0,TIMER2_COUNT				;GIVE IT A HEAD START    ;WAS 50  
        
         
DATST2:  

 
	
	.word	0xB0000000,EVENT1_PARAMS+SRC   			;CAPTURES A-D
	.word	0x00B31062,EVENT1_PARAMS+OPT                    ;CHAINS TO 3
	.word	0x00010190,EVENT1_PARAMS+CNTE  			;SHUTS OFF WHEN DONE 0X190=400=.8usec
	.word	0x07000000,EVENT1_PARAMS+IDX 
	.word	0x00050000,EVENT1_PARAMS+DST    
	.word	0x00000030,EVENT1_PARAMS+LNK   
	
	.word	0xB0000000,EVENT2_PARAMS+SRC   			;CAPTURES A-D  RELOAD
	.word	0x00B31062,EVENT2_PARAMS+OPT                    ;CHAINS TO 3
	.word	0x00010190,EVENT2_PARAMS+CNTE  			;SHUTS OFF WHEN DONE 0X190=400=.8usec
	.word	0x07000000,EVENT2_PARAMS+IDX 
	.word	0x00052000,EVENT2_PARAMS+DST    
	.word	0x00000030,EVENT2_PARAMS+LNK 
	
	.word	POWERORD  ,EVENT3_PARAMS+SRC   			;LOADS NEW ADDRESS INTO GPIO
	.word	0x051510A2,EVENT3_PARAMS+OPT                    ;CHAINS 5
	.word	0x001F0001,EVENT3_PARAMS+CNTE  			;RELOADS FROM 4 WHEN DONE
	.word	0x00040000,EVENT3_PARAMS+IDX 
	.word	0x01B00008,EVENT3_PARAMS+DST    
	.word	0x00000060,EVENT3_PARAMS+LNK  
	                  
	.word	POWERORD  ,EVENT4_PARAMS+SRC   			;LOADS NEW ADDRESS INTO GPIO RELOAD
	.word	0x051510A2,EVENT4_PARAMS+OPT                    
	.word	0x001F0001,EVENT4_PARAMS+CNTE  			
	.word	0x00040000,EVENT4_PARAMS+IDX 
	.word	0x01B00008,EVENT4_PARAMS+DST    
	.word	0x00000060,EVENT4_PARAMS+LNK  
	
	.word	0x80010000,EVENT5_PARAMS+SRC   			;DUMMY WAIT LOCATION, REDIRECTS TO OTHER FUNCTIONS
	.word	0x00390003,EVENT5_PARAMS+OPT                    ;CHAINS B WHEN DONE, OTHERWISE BACK TO 1
	.word	0x00000030,EVENT5_PARAMS+CNTE  			;SHUTS OFF WHEN DONE
	.word	0x00000000,EVENT5_PARAMS+IDX 
	.word	0x81000	  ,EVENT5_PARAMS+DST    
	.word	0x00000138,EVENT5_PARAMS+LNK 
	
	.word	0x80010000,EVENTC_PARAMS+SRC   			;DUMMY WAIT RELOAD #1
	.word	0x00390003,EVENTC_PARAMS+OPT                    ;CHAINS ETHERNET WHEN DONE
	.word	0x00000030,EVENTC_PARAMS+CNTE  		
	.word	0x00000000,EVENTC_PARAMS+IDX 
	.word	0x81000	  ,EVENTC_PARAMS+DST    
	.word	0x00000138,EVENTC_PARAMS+LNK
	 
	.word	0x6C000000,EVENTD_PARAMS+SRC   			;DUMMY WAIT #2
	.word	0x08110003,EVENTD_PARAMS+OPT                    ;CHAINS BACK TO 1
	.word	0x0000000D,EVENTD_PARAMS+CNTE  			;READS MOTOR INFO
	.word	0x00000000,EVENTD_PARAMS+IDX 
	.word	MOTDATA	  ,EVENTD_PARAMS+DST    
	.word	0x00000150,EVENTD_PARAMS+LNK 
	
	.word	MOTTBLE+60,EVENTE_PARAMS+SRC   			;DUMMY WAIT #3
	.word	0x08110003,EVENTE_PARAMS+OPT                    ;CHAINS BACK TO 1
	.word	0x0000000C,EVENTE_PARAMS+CNTE  			;WRITE MOTOR INFO
	.word	0x00000000,EVENTE_PARAMS+IDX 
	.word	0x6C700000,EVENTE_PARAMS+DST    
	.word	0x00000168,EVENTE_PARAMS+LNK 
	
	.word	LFIFO	  ,EVENTF_PARAMS+SRC   			;DUMMY WAIT #4
	.word	0x21200003,EVENTF_PARAMS+OPT                    
	.word	0x0000002B,EVENTF_PARAMS+CNTE  			;SHUTS OFF WHEN DONE
	.word	0x00000000,EVENTF_PARAMS+IDX 
	.word	0x60000000,EVENTF_PARAMS+DST    
	.word	0x00000120,EVENTF_PARAMS+LNK
	 	
     	.word	0x00007180,EVENT9_PARAMS+SRC   			;LOADS ETHERNET INTO FIFO
	.word	0x01111023,EVENT9_PARAMS+OPT                    ;CHAINS TO 1, RELOADS A
	.word	0x000E0038,EVENT9_PARAMS+CNTE  			;LDLASER PUTS CORRECT INFO TO START ETHERNET
	.word	0x00000000,EVENT9_PARAMS+IDX 
	.word	0x00900000,EVENT9_PARAMS+DST    
	.word	0x000000F0,EVENT9_PARAMS+LNK  
	
	.word	0x00007180,EVENTA_PARAMS+SRC   			;DUMMY RELOAD OF ETHERNET
	.word	0x01111023,EVENTA_PARAMS+OPT                    ;RELOADS A
	.word	0x000E0038,EVENTA_PARAMS+CNTE  			;CHAINS TO 1, 
	.word	0x00000000,EVENTA_PARAMS+IDX 
	.word	0x00900000,EVENTA_PARAMS+DST    
	.word	0x000000F0,EVENTA_PARAMS+LNK  	
	 		   	 
;***********************************************************8 LEFT OVER 		   	 	   	 
	.word	0x80010000,EVENT6_PARAMS+SRC   			;DUMMY WAIT RELOAD
	.word	0x00BB1022,EVENT6_PARAMS+OPT                    ;CHAINS b when done, otherwise back to 1
	.word	0x00030038,EVENT6_PARAMS+CNTE  			;
	.word	0x00000000,EVENT6_PARAMS+IDX 
	.word	0X81000   ,EVENT6_PARAMS+DST    
	.word	0x00000090,EVENT6_PARAMS+LNK 
	 		   	 		   	 	   	 	   	 
	.word	MOTTBLE+60,EVENTB_PARAMS+SRC   			;STORES MOTOR COMMANDS
	.word	0x28370001,EVENTB_PARAMS+OPT                    ;chains to 7
	.word	0x00000001,EVENTB_PARAMS+CNTE  			
	.word	0x00000000,EVENTB_PARAMS+IDX 
	.word	0x6C700000,EVENTB_PARAMS+DST    
	.word	0x00000000,EVENTB_PARAMS+LNK    		   	 	   	 	   	 	   	 
	
	.word	LFIFO	  ,EVENT7_PARAMS+SRC   			;LOADS LASER INFO INTO FIFO
	.word	0x21380001,EVENT7_PARAMS+OPT                    ;chians to 8
	.word	0x0000002B,EVENT7_PARAMS+CNTE  			;WAS 2A
	.word	0x00000000,EVENT7_PARAMS+IDX 
	.word	0x60000000,EVENT7_PARAMS+DST    
	.word	0x00000000,EVENT7_PARAMS+LNK 
	  
	.word	0x6C000000,EVENT8_PARAMS+SRC   			;READS MOTOR INFO
	.word	0x20390001,EVENT8_PARAMS+OPT                    ;CHAINS 9
	.word	0x00000001,EVENT8_PARAMS+CNTE  			;SHUTS OFF WHEN DONE
	.word	0x00000000,EVENT8_PARAMS+IDX 
	.word	MOTDATA,EVENT8_PARAMS+DST    
	.word	0x00000000,EVENT8_PARAMS+LNK    	    	    	  	   
	
  
	
	
	  
	 	 
	.word	0000111110101010b,CCER  
      
DATEND:	 
	
TOP:	
 
	MVK	DATST,A4
	MVK	((DATEND-DATST)>>3)-2,A1
LOADLP:		
       LDNDW	*A4++[1],A3:A2
       NOP	4
       STW	A2,*A3
	BDEC	LOADLP,A1
	NOP	5 
       MVC	CSR,B0
       OR	1,B0,B0
       MVC	B0,CSR  

       MVK	CLRBCK,B2
       B	CLEARREG
       NOP	5
CLRBCK: 

       load		0001100010000000b,GPVAL                   ;reset the a-d
       delay		100
       load		0000000010000000b,GPVAL
       delay		80000 
       dload		00000000010000010011000000000000b,McBSP1_SPCR          ; enable txmitter
       dload		00000000010000010011000000000000b,McBSP2_SPCR          ; enable txmitter
	LOAD		0x0,0x60000000					;RESET FIFO
RLPP:        
       DELAY		80000000  
       CALL		INITCRC
       Dload		0x001f77ff,McBSP1_DXR                  	 ;FFFF=TEST OUT  was 77ff
       DLOAD		001100000000000000001101b,McBSP2_DXR     	;was  001100000000000000001001b
       delay		4000
       Dload		0x0011BeFF,McBSP1_DXR       ;was beff   
       dload		000000000010000100100100b,McBSP2_DXR                     ; CONTROL LATCH 2ND  bit 11=mtlock
       delay		50000000                                                    ; 5MS DELAY NEEDED HERE
       DLOAD		0x401802,McBSP2_DXR                                      ;was c01802  then c01a02(too high) 1902 for 625mhz
       delay		2000000 
	load		0000000110000000b,GPVAL                 		;switch to dtoa    

D2ALP:	
	DLOAD		100100000000001000000000b,McBSP2_DXR                     ; ENABLE INTERNAL REFERENCE
	DELAY		20000
	dload		0x0D0000,McBSP2_DXR 					;HV SET	  0X18d0=195v   1a80=180v 1d00=150	    	     	      	    	     	      	    	     	      	    	    
	delay		20000
	DLOAD		100100000000001000000000b,McBSP2_DXR                     ; ENABLE INTERNAL REFERENCE
	DELAY		20000
	dload		0x0D0000,McBSP2_DXR 					;HV SET	  0X18d0=195v   1a80=180v 1d00=150	    	     	      	    	     	      	    	     	      	    	    

	Dload		0x001E07FF,McBSP1_DXR       	;was beff 
	DELAY		20000                                                    ;
	Dload		0x001D3FF,McBSP1_DXR       	;was beff 
	DELAY		20000  
;*********************************************** PROGRAM 4 A-Ds ****************************	
QQQ:	
	MVK		4,A0
	MVKB		GPVAL,A18
		
TTT:       
	SUB		A0,1,A9
       STW		A9,*A18
       DELAY		1000
       DELAY		20000  
	Dload		0x0011B7FF,McBSP1_DXR       ;config   was b7ff  
	DELAY		20000  
	Dload		0x00137F7F,McBSP1_DXR       ;voltage gain 3C07F I CHANNEL
	DELAY		20000  
	Dload		0x001B7F7F,McBSP1_DXR       ;VOLTAGE GAIN Q CHANNEL
	DELAY		20000    
    	DELAY		20000  
    	Dload		0x001DFFFF,McBSP1_DXR       ;DUAL EDGE SAMPLING               
	DELAY		20000  
	SUB		A0,1,A0
	[A0]BNOP	TTT,5 
	DELAY		20000
	
;**************************************************************** GET BOTH A-DS ON THE SAME CLK PHASE


	 MVK		40,A2			; Prepare the Phase Check loop
	 MVK		0,A20			; Move address O into A20 to vector for possible reset

TESTPHASE: 
	SUB		A2,1,A2
	[!A2]BNOP	A20,5  			;RESTART IF NO LUCK AFTER 100 CYCLES  							;TOGGLES PD TO ALIGN PHASE, ADRESET NO WORK.   
	LOAD		1000000000000000b,GPVAL	;power down, this works
	DELAY		2000

	LOAD		0X0,GPVAL		; GPIO8 must be low to command PLL
	DELAY		1000000			;
	 
;;       DLOAD		0x102124,McBSP2_DXR     ; PLL CONTROL LATCH PROGRAMMED FOR ASYNC POWER DOWN
;	DELAY		20000			; ENSURE PLL IS POWERED DOWN

;       LOAD		0x4000,GPVAL		; ADCRESET(GPIO14)
;	DELAY		10000			; HOLD ADCRESET FOR A WHILE
	
;	LOAD		0x00,GPVAL		; ADCs READY
;	DELAY		1000			;
;	DLOAD		0x002124,McBSP2_DXR	; PLL OUT OF POWER DOWN

;       delay		5000000                ; 5MS DELAY NEEDED HERE

       MVKB		McBSP0_DXR,A10 
       MVK		0x2C8,A9		
       LDW		*A10[-1],A11 		;make sure buffer is clear
	DELAY		20000 
       STW		A9,*A10 
       DELAY		20000  
   	LDW		*A10[-1],A11 		;this is from last conversion
 	DELAY		20000 
  	STW		A9,*A10 
       DELAY		20000  
;   	LDW		*A10[-1],A11 
;       NOP		4 
;       LDW		*A10[-1],A11 
 ;      NOP		4
 ;      LDW		*A10[-1],A11 
;       NOP		4       
;       STW		A9,*A10 
;       DELAY		20000  
               
       LDW		*A10[-1],A13		;first result from this cycle
       NOP		4  
       MVK		350,A12
       CMPGT		A13,A12,A0
       [A0]BNOP	TESTPHASE,5
	
;*************************************************** GET RPM OUT OF EEPROM
	MVKB		0x64011000,B10                  ;GET RPM OUT OF EEPROM, IF THERE
	LDW		*B10,B11
	NOP		4
	MVKB		MOTTBLE,B10
	STW		B11,*B10[8]
          
;************************************* ENABLE INTERRUPT
	
       mvkl		0000000000010011b,b0		; EXT INT6 
       mvc		b0,IER 
	LOAD		000010b,MUXL			;TIMER 2   00010b for timer1   was 010011B for timer2
	
TLOOP:	

	LOAD		0001101100001111b,McBSP1_PCR  
	load		0000100110000000b,GPVAL		;RESET A-D AND FIFO OE  ;no reset dsh
	delay		10000
	LOAD            0001101100001110b,McBSP1_PCR       ;RESETS FIFOS
	delay		10000
	LOAD            0001101100001111b,McBSP1_PCR  
	DELAY		10000
	LOAD		0000000110000000b,GPVAL 
	MVKB		0000000000000000b,A31			; TURN OFF A-D'S  
	delay		100000   
	MVK		7,A31 
	MVKB		0xD000,B15 			; INCASE STACK IS USED
	DELAY		10000 
	DELAY		20000 
	LOAD		0001000000000000b,GPVAL         ;CALIBRATE UNIT
	DELAY		10000
	LOAD		0x0,GPVAL  
	
	MVKB		700000,B31              ;12 SECONDS = 3 MILLION;700000
	MVKB		0xD000,B15  
	
	MVKB		0x68000000,A6
	MVKB		0x40000,A7  
	MVKB		0xA0000,A5
	MVK		0100000000000000b,A9  
	MVKB		0x0F00,A19   
	MVK		0,A13
	
	LOAD            0001101100001111b,McBSP1_PCR 
;************************************************************ TEST CODE BEGIN

	MVKB		0x18181818,A6
	MVKB		0x20202020,A7
	CMPGTU4		A7,A6,A5
SELF:
;	BNOP		SELF,5
														;INDICATOR TO REPROGRAM    

LOOPBIG:   
        IDLE 
        MVKB		0x6C000000,A12
        LDH		*A12,A11
        NOP		4
        MVKB		MOTDATA,A10
        STH		A11,*A10
	 MVKB		MOTTBLE,A10
	 LDW		*A10[15],A11
	 NOP		4
	 STH		A11,*A12[4]
         
        CALL		RUNMOTOR				;ALWAYS RUN MOTOR  
        CALL		SERIAL  
        		

        SUB		B31,1,B31
        MV		B31,B1
        [B1]BNOP	LOOPBIG,5  
        

;****************************************** DMA FROM FIFO **************************************                   
;
DDDK:   
        
	DLOAD		0x10000,EMIFB_GCR
	LOAD		0001101100001111b,McBSP1_PCR  
	load		0000100110000000b,GPVAL		;RESET A-D AND FIFO OE  ;no dsh
	delay		10000
	LOAD            0001101100001110b,McBSP1_PCR       ;RESETS FIFOS
	delay		10000
	LOAD            0001101100001111b,McBSP1_PCR  
	DELAY		10000
	LOAD		0000000110000000b,GPVAL      
	LOAD		0001000000000000b,GPVAL         ;CALIBRATE UNIT
       DELAY		300000 
;       LOAD		0100000000000000b,GPVAL                     ;sync the a-d's    
    
;       DELAY		100
       LOAD		0000000000000000b,GPVAL 
       DELAY		100000
       CALL		PHY
       DELAY		10000

	DLOAD		0x000000E0,EMIF_CE0
       DLOAD		0x000000E0,EMIF_CE3
	DLOAD		0x01222000+100,  EMIF_SDRP
	DLOAD		0x10000,EMIF_GCR
	DLOAD		01100010B,EMIF_CESEC3 
	DLOAD		0x10020,EMIF_GCR  
	DELAY		20000
       MVK		0010000000101000b,B31 
;---------------------------------------------------------------      
	MVK		64,A0	; was 8
EDMAT: 
	MVKB		ESR,A12  ; Quoted out earlier
	MVK		0000000000000010b,A30    
	STW		A30,*A12 ; Quoted out earlier
;---------------------------------------------------------------   
	DELAY		20000
	SUB		A0,1,A0
	[A0]BNOP	EDMAT,5

	MVK		DATST2,A4
	MVK		((DATEND-DATST2)>>3)-2,A1
LOADLP2:		
       LDNDW		*A4++[1],A3:A2
       NOP		4
       STW		A2,*A3
	BDEC		LOADLP2,A1
	NOP		5 

;***************************************** REDO HIGH VOLTAGE SETUP
	load		0000000110000000b,GPVAL
	DELAY		500   
	DLOAD		100100000000001000000000b,McBSP2_DXR                     ; ENABLE INTERNAL REFERENCE
	DELAY		20000
	dload		0x0D0000,McBSP2_DXR 

       DELAY          100000
       LOAD		0001000000000000b,GPVAL 		;DO A CAL
       DELAY           10000
       LOAD            0x0,GPVAL  
       DELAY		10000
       DELAY		1000
       LOAD		0x2000 + (8*1),GPVAL                                    
;	ZERO		B31
	MVK		64,B31	                                 
       DELAY		2000			;SET UP FIRST CYCLE 
      
MAINLOOP:
;************************************************************** CYCLE ONE	
	IDLE
	MV		B31,A0
	[A0]SUB		B31,1,B31
	MVKB		ESR,A12  
	MVK		0000000000000010b,A30    
	[A0]STW		A30,*A12
	MVK		0,A12 
	CALL		LDLASER
	CALL		SERIAL
	CALL		RUNMOTOR 

	CALL		READSEND6 
	
READRET:
	CALL		SETADC
	CACHELOAD1
	CACHELOAD2
	GETTIME		6 

EDMAWT:
	MVKB		PQSR,A12
	LDW		*A12,A13
	NOP		4
	CMPLT		A13,15,A0
	[A0]BNOP	EDMAWT,5
 	BNOP		MAINLOOP,5	 
 
	
; ******************************************** END OF LOOP **************************************************	
CALDATA:
        .include	"Caltable.h"   

        .word		0x2000 + (8*1)          ;moved to end
POWERORD:
;	.word		0x2000 + (8*1)          ;moved to end
	.word		0x2100 + (8*3);WAS 3			;gpio7 , 8 are reversed
	.word		0x2080 + (8*0)
	.word		0x2180 + (8*2);WAS 2
	
	.word		0x2000 +(33*1)+ (8*1)
	.word		0x2100 +(33*1)+ (8*2)
	.word		0x2080 +(33*1)+ (8*0) ;SWAPPED 
	.word		0x2180 +(33*1)+ (8*3) 
		
	.word		0x2000 +(33*2) + (8*1);SWAPPED
	.word		0x2100 +(33*2) + (8*2) 
	.word		0x2080 +(33*2) + (8*0)
	.word		0x2180 +(33*2) + (8*3) 
		
	.word		0x2000 +(33*3) + (8*1)
	.word		0x2100 +(33*3) + (8*2) 
	.word		0x2080 +(33*3) + (8*0)
	.word		0x2180 +(33*3) + (8*3) 
		 
	.word		0x2000   +4+2048 + (8*1)
	.word		0x2100  +4+2048 + (8*2)
	.word		0x2080   +4+2048+ (8*0)
	.word		0x2180   +4+2048+ (8*3)
	
	.word		0x2000 +(33*1)+4+2048 + (8*1)
	.word		0x2100 +(33*1)+4+2048 + (8*2)
	.word		0x2080 +(33*1)+4+2048 + (8*0)
	.word		0x2180 +(33*1)+4+2048+ (8*3) 
		
	.word		0x2000 +(33*2)+4+2048 + (8*1)
	.word		0x2100 +(33*2)+4+2048 + (8*2)
	.word		0x2080 +(33*2)+4+2048 + (8*0)
	.word		0x2180 +(33*2)+4+2048 + (8*3)
		
	.word		0x2000 +(33*3)+4+2048 + (8*1)
	.word		0x2100 +(33*3)+4+2048 + (8*2)
	.word		0x2080 +(33*3)+4+2048+ (8*0)
	.word		0x2180 +(33*3)+4+2048 + (8*3)	 	
	.word		0x2000 +8*1


        
	.data
	.def	DIVTABLE
DIVTABLE:
	.word	0x7FFFFFFF 		;THIS IS ACTUALLY INFINITY
	.word	0x7FFFFFFF 
	.word	0x7FFFFFFF/2		;2 PIXEL OFFSET
	.word	0x7FFFFFFF/3
	.word	0x7FFFFFFF/4
	.word	0x7FFFFFFF/5 
	.word	0x7FFFFFFF/6	
	.word	0x7FFFFFFF/7 
	.word	0x7FFFFFFF/8
	.word	0x7FFFFFFF/9 
	.word	0x7FFFFFFF/10	
	.word	0x7FFFFFFF/11
	.word	0x7FFFFFFF/12
	.word	0x7FFFFFFF/13
	.word	0x7FFFFFFF/14	
	.word	0x7FFFFFFF/15
	.word	0x7FFFFFFF/16	
	.word	0x7FFFFFFF/17
	.word	0x7FFFFFFF/18
	.word	0x7FFFFFFF/19 
	.word	0x7FFFFFFF/20	
	.word	0x7FFFFFFF/21	
	.word	0x7FFFFFFF/22	
	.word	0x7FFFFFFF/23
	.word	0x7FFFFFFF/24
	.word	0x7FFFFFFF/25 
	.word	0x7FFFFFFF/26	
	.word	0x7FFFFFFF/27 
	.word	0x7FFFFFFF/28
	.word	0x7FFFFFFF/29 
	.word	0x7FFFFFFF/30	
	.word	0x7FFFFFFF/31
	.word	0x7FFFFFFF/32
	.word	0x7FFFFFFF/33
	.word	0x7FFFFFFF/34	
	.word	0x7FFFFFFF/35
	.word	0x7FFFFFFF/36	
	.word	0x7FFFFFFF/37 
	.word	0x7FFFFFFF/38
	.word	0x7FFFFFFF/39 
	.word	0x7FFFFFFF/40	
	.word	0x7FFFFFFF/41
	.word	0x7FFFFFFF/42
	.word	0x7FFFFFFF/43
	.word	0x7FFFFFFF/44	
	.word	0x7FFFFFFF/45
	.word	0x7FFFFFFF/46			
	.word	0x7FFFFFFF/47
	.word	0x7FFFFFFF/48	
	.word	0x7FFFFFFF/49
	.word	0x7FFFFFFF/50	
	.word	0x7FFFFFFF/51
	.word	0x7FFFFFFF/52
	.word	0x7FFFFFFF/53
	.word	0x7FFFFFFF/54	
	.word	0x7FFFFFFF/55
	.word	0x7FFFFFFF/56			
	.word	0x7FFFFFFF/57
	.word	0x7FFFFFFF/58	
	.word	0x7FFFFFFF/59
	.word	0x7FFFFFFF/60		
	.word	0x7FFFFFFF/61
	.word	0x7FFFFFFF/62
	.word	0x7FFFFFFF/63
	.word	0x7FFFFFFF/64	
	.word	0x7FFFFFFF/65
	.word	0x7FFFFFFF/66			
	.word	0x7FFFFFFF/67
	.word	0x7FFFFFFF/68	
	.word	0x7FFFFFFF/69
	.word	0x7FFFFFFF/70	
	.word	0x7FFFFFFF/71
	.word	0x7FFFFFFF/72
	.word	0x7FFFFFFF/73
	.word	0x7FFFFFFF/74	
	.word	0x7FFFFFFF/75
	.word	0x7FFFFFFF/76			
	.word	0x7FFFFFFF/77
	.word	0x7FFFFFFF/78	
	.word	0x7FFFFFFF/79
	.word	0x7FFFFFFF/80	  
	.word	0x7FFFFFFF/81
	.word	0x7FFFFFFF/82
	.word	0x7FFFFFFF/83
	.word	0x7FFFFFFF/84	
	.word	0x7FFFFFFF/85
	.word	0x7FFFFFFF/86			
	.word	0x7FFFFFFF/87
	.word	0x7FFFFFFF/88	
	.word	0x7FFFFFFF/89
	.word	0x7FFFFFFF/90	
	.word	0x7FFFFFFF/91
	.word	0x7FFFFFFF/92
	.word	0x7FFFFFFF/93
	.word	0x7FFFFFFF/94	
	.word	0x7FFFFFFF/95
	.word	0x7FFFFFFF/96			
	.word	0x7FFFFFFF/97
	.word	0x7FFFFFFF/98	
	.word	0x7FFFFFFF/99
	.word	0x7FFFFFFF/100
	.word	0x7FFFFFFF/101	  
	.word	0x7FFFFFFF/102
	.word	0x7FFFFFFF/103
	.word	0x7FFFFFFF/104	
	.word	0x7FFFFFFF/105
	.word	0x7FFFFFFF/106			
	.word	0x7FFFFFFF/107
	.word	0x7FFFFFFF/108	
	.word	0x7FFFFFFF/109
	.word	0x7FFFFFFF/110	
	.word	0x7FFFFFFF/111
	.word	0x7FFFFFFF/112
	.word	0x7FFFFFFF/113
	.word	0x7FFFFFFF/114	
	.word	0x7FFFFFFF/115
	.word	0x7FFFFFFF/116			
	.word	0x7FFFFFFF/117
	.word	0x7FFFFFFF/118	
	.word	0x7FFFFFFF/119
	.word	0x7FFFFFFF/120
	.word	0x7FFFFFFF/121	  
	.word	0x7FFFFFFF/122
	.word	0x7FFFFFFF/123
	.word	0x7FFFFFFF/124	
	.word	0x7FFFFFFF/125
	.word	0x7FFFFFFF/126			
	.word	0x7FFFFFFF/127 
DIVTBL2:	
	.word	0x7FFFFFFF/128	
	.word	0x7FFFFFFF/129 
	.word	0x7FFFFFFF/130		;2 PIXEL OFFSET
	.word	0x7FFFFFFF/131
	.word	0x7FFFFFFF/132
	.word	0x7FFFFFFF/133 
	.word	0x7FFFFFFF/134	
	.word	0x7FFFFFFF/135
	.word	0x7FFFFFFF/136
	.word	0x7FFFFFFF/137 
	.word	0x7FFFFFFF/138	
	.word	0x7FFFFFFF/139
	.word	0x7FFFFFFF/140
	.word	0x7FFFFFFF/141
	.word	0x7FFFFFFF/142	
	.word	0x7FFFFFFF/143
	.word	0x7FFFFFFF/144	
	.word	0x7FFFFFFF/145
	.word	0x7FFFFFFF/146
	.word	0x7FFFFFFF/147 
	.word	0x7FFFFFFF/148	
	.word	0x7FFFFFFF/149	
	.word	0x7FFFFFFF/150	
	.word	0x7FFFFFFF/151
	.word	0x7FFFFFFF/152
	.word	0x7FFFFFFF/153 
	.word	0x7FFFFFFF/154	
	.word	0x7FFFFFFF/155 
	.word	0x7FFFFFFF/156
	.word	0x7FFFFFFF/157 
	.word	0x7FFFFFFF/158	
	.word	0x7FFFFFFF/159
	.word	0x7FFFFFFF/160
	.word	0x7FFFFFFF/161
	.word	0x7FFFFFFF/162	
	.word	0x7FFFFFFF/163
	.word	0x7FFFFFFF/164
	.word	0x7FFFFFFF/165
	.word	0x7FFFFFFF/166
	.word	0x7FFFFFFF/167
	.word	0x7FFFFFFF/168
	.word	0x7FFFFFFF/169
	.word	0x7FFFFFFF/170
	.word	0x7FFFFFFF/171
	.word	0x7FFFFFFF/172
	.word	0x7FFFFFFF/173
	.word	0x7FFFFFFF/174		
	.word	0x7FFFFFFF/175
	.word	0x7FFFFFFF/176
	.word	0x7FFFFFFF/177
	.word	0x7FFFFFFF/178
	.word	0x7FFFFFFF/179
	.word	0x7FFFFFFF/180
	.word	0x7FFFFFFF/181
	.word	0x7FFFFFFF/182
	.word	0x7FFFFFFF/183
	.word	0x7FFFFFFF/184		
	.word	0x7FFFFFFF/185
	.word	0x7FFFFFFF/186
	.word	0x7FFFFFFF/187
	.word	0x7FFFFFFF/188	
	.word	0x7FFFFFFF/189
	.word	0x7FFFFFFF/190
	.word	0x7FFFFFFF/191
	.word	0x7FFFFFFF/192
	.word	0x7FFFFFFF/193
	.word	0x7FFFFFFF/194		
	.word	0x7FFFFFFF/194
	.word	0x7FFFFFFF/196
	.word	0x7FFFFFFF/197
	.word	0x7FFFFFFF/198
	.word	0x7FFFFFFF/199
	.word	0x7FFFFFFF/200
	.word	0x7FFFFFFF/201
	.word	0x7FFFFFFF/202
	.word	0x7FFFFFFF/203
	.word	0x7FFFFFFF/204		
	.word	0x7FFFFFFF/205
	.word	0x7FFFFFFF/206
	.word	0x7FFFFFFF/207
	.word	0x7FFFFFFF/208  
	.word	0x7FFFFFFF/209
	.word	0x7FFFFFFF/210
	.word	0x7FFFFFFF/211
	.word	0x7FFFFFFF/212
	.word	0x7FFFFFFF/213
	.word	0x7FFFFFFF/214		
	.word	0x7FFFFFFF/215
	.word	0x7FFFFFFF/216
	.word	0x7FFFFFFF/217
	.word	0x7FFFFFFF/218
	.word	0x7FFFFFFF/219
	.word	0x7FFFFFFF/220
	.word	0x7FFFFFFF/221
	.word	0x7FFFFFFF/222
	.word	0x7FFFFFFF/223
	.word	0x7FFFFFFF/224		
	.word	0x7FFFFFFF/225
	.word	0x7FFFFFFF/226
	.word	0x7FFFFFFF/227
	.word	0x7FFFFFFF/228
	.word	0x7FFFFFFF/229	  
	.word	0x7FFFFFFF/230
	.word	0x7FFFFFFF/231
	.word	0x7FFFFFFF/232	
	.word	0x7FFFFFFF/233
	.word	0x7FFFFFFF/234			
	.word	0x7FFFFFFF/235
	.word	0x7FFFFFFF/236	
	.word	0x7FFFFFFF/237
	.word	0x7FFFFFFF/238	
	.word	0x7FFFFFFF/239
	.word	0x7FFFFFFF/240
	.word	0x7FFFFFFF/241
	.word	0x7FFFFFFF/242	
	.word	0x7FFFFFFF/243
	.word	0x7FFFFFFF/244			
	.word	0x7FFFFFFF/245
	.word	0x7FFFFFFF/246	
	.word	0x7FFFFFFF/247
	.word	0x7FFFFFFF/248
	.word	0x7FFFFFFF/249	  
	.word	0x7FFFFFFF/250
	.word	0x7FFFFFFF/251
	.word	0x7FFFFFFF/252	
	.word	0x7FFFFFFF/253
	.word	0x7FFFFFFF/254			
	.word	0x7FFFFFFF/255
	.word	0x7FFFFFFF/256
;*********************************************** LASER FIRING ORDERS **********************************	
			
	.def	FORDER  
	.def	PACORD 
	.def	SQTBL  
	.def	CRCTBLE 
	.def	ETHTBLE
	
ETHTBLE:	.set	0x5180+0x2000   ; SKIP UP 8K TO OVERLAY DATA IN CACHE  IS 0xA00 LONG FOR BOTH
DATATOP:	
	 .WORD	0,0,0,0
FORDER:
;	.byte   40,41,42,43,44,45,46,47,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87	
;	.byte   40,41,42,43,44,45,46,47,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87	
;	.byte   40,41,42,43,44,45,46,47,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87	  

;         .byte   80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87	
 ;        .byte   80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87
;         .byte   80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87,80,81,82,83,84,85,86,87

	.WORD	0,0,0
PACORD:	
;	.byte	 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
;	.byte	32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
;	.byte	64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95	
        .word		0x2000 + (8*1)          ;moved to end
POWERORD2:
;	.word		0x2000 + (8*1)          ;moved to end
	.word		0x2100 + (8*3);WAS 3			;gpio7 , 8 are reversed
	.word		0x2080 + (8*0)
	.word		0x2180 + (8*2);WAS 2
	
	.word		0x2000 +(33*1)+ (8*1)
	.word		0x2100 +(33*1)+ (8*2)
	.word		0x2080 +(33*1)+ (8*0) ;SWAPPED 
	.word		0x2180 +(33*1)+ (8*3) 
		
	.word		0x2000 +(33*2) + (8*1);SWAPPED
	.word		0x2100 +(33*2) + (8*2) 
	.word		0x2080 +(33*2) + (8*0)
	.word		0x2180 +(33*2) + (8*3) 
		
	.word		0x2000 +(33*3) + (8*1)
	.word		0x2100 +(33*3) + (8*2) 
	.word		0x2080 +(33*3) + (8*0)
	.word		0x2180 +(33*3) + (8*3) 
		 
	.word		0x2000   +4+2048 + (8*1)
	.word		0x2100  +4+2048 + (8*2)
	.word		0x2080   +4+2048+ (8*0)
	.word		0x2180   +4+2048+ (8*3)
	
	.word		0x2000 +(33*1)+4+2048 + (8*1)
	.word		0x2100 +(33*1)+4+2048 + (8*2)
	.word		0x2080 +(33*1)+4+2048 + (8*0)
	.word		0x2180 +(33*1)+4+2048+ (8*3) 
		
	.word		0x2000 +(33*2)+4+2048 + (8*1)
	.word		0x2100 +(33*2)+4+2048 + (8*2)
	.word		0x2080 +(33*2)+4+2048 + (8*0)
	.word		0x2180 +(33*2)+4+2048 + (8*3)
		
	.word		0x2000 +(33*3)+4+2048 + (8*1)
	.word		0x2100 +(33*3)+4+2048 + (8*2)
	.word		0x2080 +(33*3)+4+2048+ (8*0)
	.word		0x2180 +(33*3)+4+2048 + (8*3)	 	
	.word		0x2000 +8*1
		
	                                                                        
       
	.word	0,0,0,0  


	
;	.sect	".data2"  
	.align		4
	.WORD		0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
CRCTBLE:	                          
         .loop  	256
	.word		0
	.endloop
	
	
	 
	.text
LFIFO:
	.loop		64
	.word		0
	.endloop

SQTBL:	
	.loop  		256
	.byte		0
	.endloop 	
	
	
	
	                	                                 
	.end

Fullscreen HDL2-June2708.pjt.txt Download

; Code Composer Project File, Version 2.0 (do not modify or remove this line)

[Project Settings]
ProjectDir="C:\Users\kvallabhaneni\Desktop\HDL2_VF9_cat-hallfailtest-release\"
ProjectType=Executable
CPUFamily=TMS320C64XX
Tool="Compiler"
Tool="CustomBuilder"
Tool="DspBiosBuilder"
Tool="Linker"
Config="Debug"
Config="Release"

[Source Files]
Source="ClearRegs.asm"
Source="CRC-iniFordt.sa"
Source="EtherRecieve.asm"
Source="EtherRESET.asm"
Source="Ethersetuphdl.asm"
Source="LDLASER8xR2.sa"
Source="MainDualA-DR3.asm"
Source="MotorR3.sa"
Source="Read120Mwtimestamp.sa"
Source="SerialIn.sa"
Source="SETADCr2.sa"
Source="StoreEprom11-02.asm"
Source="SyncDMA.sa"
Source="Time01.sa"
Source="EpromBoot11-02.cmd"

["Compiler" Settings: "Debug"]
Options=-k -pm -al -op2 -o2 -mt -mh -mi -ms0 -mv6400 --mem_model:data=near

["Compiler" Settings: "Release"]
Options=-q -o3 -fr"C:\Users\kvallabhaneni\Desktop\HDL2_VF9_cat-hallfailtest-release\Release" -mv6400

["DspBiosBuilder" Settings: "Debug"]
Options=-v6x

["DspBiosBuilder" Settings: "Release"]
Options=-v6x

["Linker" Settings: "Debug"]
Options=-q -h -m".\Debug\HDL64.map" -o".\Debug\HDL64.out"

["Linker" Settings: "Release"]
Options=-q -c -m".\Release\DADVision.map" -o".\Release\DADVision.out" -x

Fullscreen HDL2-June2708.mak.txt Download

# Generated by Code Composer Studio

# Makefile for C:\Users\kvallabhaneni\Desktop\HDL2_VF9_cat-hallfailtest-release\HDL2-June2708.pjt
# This makefile is intended to be compatible with any version of make.
#
# USAGE
# Step 1: Set up proper environment variables, by running DosRun.bat
#         (Windows platform) or set them up by yourself.
# Step 2: Change directory to the directory of this makefile, which is stored
#         in the macro MAKEFILE_DIR
# Step 3: In the makefile directory, you can perform one of these operations:
#         To build the configuration <config>, type make <config>
#         To clean the configuration <config>, type make <config>clean
#         To rebuild the configuration <config>, type make <config>rebuild
#         If <config> is not specified, the operations apply to the active
#         configuration, which is stored in the macro ACTIVE_CONFIG.
# For CCS gmake users: In the makefile directory, you can perform one of these operations:
#         To build the configuration <config>, type gmake projectName.mak <config>
#         To clean the configuration <config>, type gmake <config>clean
#         To rebuild the configuration <config>, type gmake <config>rebuild
#         If <config> is not specified, the operations apply to the active
#         configuration, which is stored in the macro ACTIVE_CONFIG.
#
# DETAILS
# Step 1:
#   In order for this makefile to work, you must have the environment variables
# set properly.  Specifically, the paths to build programs and the system-wide
# header files and library files must be set.
#   In Windows, a batch file "DosRun.bat", located at the root directory of
# the Code Composer Studio installation, is provided to set up these variables.
#   In UNIX, you can set up these environment variables yourself.  The "PATH"
# variable must include the paths to the build programs, and the "C_DIR" and
# "A_DIR" variables must include the paths to the system-wide header files and
# library files.
#
# Step 2:
#   System files referenced by this project are specified in full path names,
# while other files in this project are specified in path names relative to the
# directory of this makefile.  These directory names are stored in DIR_x macros.
# You can modify them to reflect the locations of the files on this system.
#   It is important that the command to make this makefile is issued from the
# directory of this makefile, which is stored in the macro MAKEFILE_DIR.
#
# Step 3:
#   There are three operations that can be performed on a build configuration:
# make, clean, and rebuild. A rebuild forces all files in the configuration to
# be rebuilt.
# To build the configuration <config>, type make <config>
# To clean the configuration <config>, type make <config>clean
# To rebuild the configuration <config>, type make <config>rebuild
#   If <config> is not specified, the operations apply to the active
# configuration. The active configuration can be any valid build configuration
# (including "all") and is specified in the macro ACTIVE_CONFIG.
# To build the active configuration, type make
# To clean the active configuration, type make clean
# To rebuild the active configuration, type make rebuild
#
# For CCS gmake users:
#   There are three operations that can be performed on a build configuration:
# make, clean, and rebuild. A rebuild forces all files in the configuration to
# be rebuilt.
# To build the configuration <config>, type gmake projectName.mak <config>
# To clean the configuration <config>, type gmake <config>clean
# To rebuild the configuration <config>, type gmake <config>rebuild
#   If <config> is not specified, the operations apply to the active
# configuration. The active configuration can be any valid build configuration
# (including "all") and is specified in the macro ACTIVE_CONFIG.
# To build the active configuration, type gmake
# To clean the active configuration, type gmake clean
# To rebuild the active configuration, type gmake rebuild

# The MKFLAGS macro takes the place of the MFLAGS or MAKEFLAGS macro. If it
# gives you any trouble, just delete the macro. It is used when recursively
# calling make (i.e. when rebuilding)
MKFLAGS= $(MFLAGS)$(MAKEFLAGS)

MAKEFILE_DIR= C:/Users/kvallabhaneni/Desktop/HDL2_VF9_cat-hallfailtest-release

# The active configuration can be one of these valid build configurations:
# all, Debug
ACTIVE_CONFIG= Debug

# These DIR_x macros store the directories of the files used in this project.
# There must be no trailing spaces after these macros.

DIR_1= C:/CCStudio_v3.3PLA/C6000/cgtools/bin

DIR_2= Debug

SOURCE=ClearRegs.asm
SOURCE=CRC-iniFordt.sa
SOURCE=EtherRecieve.asm
SOURCE=EtherRESET.asm
SOURCE=Ethersetuphdl.asm
SOURCE=LDLASER8xR2.sa
SOURCE=MainDualA-DR3.asm
SOURCE=MotorR3.sa
SOURCE=Read120Mwtimestamp.sa
SOURCE=SerialIn.sa
SOURCE=SETADCr2.sa
SOURCE=StoreEprom11-02.asm
SOURCE=SyncDMA.sa
SOURCE=Time01.sa
SOURCE=EpromBoot11-02.cmd

active_config: $(ACTIVE_CONFIG)

norecurse: $(ACTIVE_CONFIG)_norecurse

clean: $(ACTIVE_CONFIG)clean

clean_norecurse: $(ACTIVE_CONFIG)clean_norecurse

rebuild: $(ACTIVE_CONFIG)rebuild

force_rebuild: 

all: Debug 

allclean: Debugclean 

allrebuild: Debugrebuild 


Debugclean: Debugclean_norecurse

Debugclean_norecurse: 
	-@rm -f ClearRegs.obj
	-@rm -f CRC-iniFordt.obj
	-@rm -f EtherRecieve.obj
	-@rm -f EtherRESET.obj
	-@rm -f Ethersetuphdl.obj
	-@rm -f LDLASER8xR2.obj
	-@rm -f MainDualA-DR3.obj
	-@rm -f MotorR3.obj
	-@rm -f Read120Mwtimestamp.obj
	-@rm -f SerialIn.obj
	-@rm -f SETADCr2.obj
	-@rm -f StoreEprom11-02.obj
	-@rm -f SyncDMA.obj
	-@rm -f Time01.obj
	-@rm -f $(DIR_2)/HDL64.out

Debugrebuild: 
	$(MAKE) $(MFLAGS) -f HDL2-June2708.mak Debug FRC=force_rebuild

Debug: Debug_norecurse

Debug_norecurse: $(DIR_2)/HDL64.out



ClearRegs.obj \
CRC-iniFordt.obj \
EtherRecieve.obj \
EtherRESET.obj \
Ethersetuphdl.obj \
LDLASER8xR2.obj \
MainDualA-DR3.obj \
MotorR3.obj \
Read120Mwtimestamp.obj \
SerialIn.obj \
SETADCr2.obj \
StoreEprom11-02.obj \
SyncDMA.obj \
Time01.obj: $(FRC) ClearRegs.asm CRC-iniFordt.sa EtherRecieve.asm EtherRESET.asm Ethersetuphdl.asm LDLASER8xR2.sa MainDualA-DR3.asm MotorR3.sa Read120Mwtimestamp.sa SerialIn.sa SETADCr2.sa StoreEprom11-02.asm SyncDMA.sa Time01.sa Macros.h Tms6416.h Caltable.h 
	-@echo -k -pm -al -op2 -o2 -mt -mh -mi -ms0 -mv6400 --mem_model:data=near> HDL2-June2708.Debug.lkf
	-@echo "ClearRegs.asm">> HDL2-June2708.Debug.lkf
	-@echo "CRC-iniFordt.sa">> HDL2-June2708.Debug.lkf
	-@echo "EtherRecieve.asm">> HDL2-June2708.Debug.lkf
	-@echo "EtherRESET.asm">> HDL2-June2708.Debug.lkf
	-@echo "Ethersetuphdl.asm">> HDL2-June2708.Debug.lkf
	-@echo "LDLASER8xR2.sa">> HDL2-June2708.Debug.lkf
	-@echo "MainDualA-DR3.asm">> HDL2-June2708.Debug.lkf
	-@echo "MotorR3.sa">> HDL2-June2708.Debug.lkf
	-@echo "Read120Mwtimestamp.sa">> HDL2-June2708.Debug.lkf
	-@echo "SerialIn.sa">> HDL2-June2708.Debug.lkf
	-@echo "SETADCr2.sa">> HDL2-June2708.Debug.lkf
	-@echo "StoreEprom11-02.asm">> HDL2-June2708.Debug.lkf
	-@echo "SyncDMA.sa">> HDL2-June2708.Debug.lkf
	-@echo "Time01.sa">> HDL2-June2708.Debug.lkf
	"$(DIR_1)/cl6x" -k -pm -al -op2 -o2 -mt -mh -mi -ms0 -mv6400 --mem_model:data=near -@"HDL2-June2708.Debug.lkf"
	-@rm -f HDL2-June2708.Debug.lkf

$(DIR_2)/HDL64.out: ClearRegs.obj CRC-iniFordt.obj EtherRecieve.obj EtherRESET.obj Ethersetuphdl.obj LDLASER8xR2.obj MainDualA-DR3.obj MotorR3.obj Read120Mwtimestamp.obj SerialIn.obj SETADCr2.obj StoreEprom11-02.obj SyncDMA.obj Time01.obj EpromBoot11-02.cmd 
	-@echo -z -q -h -m"./Debug/HDL64.map" -o"./Debug/HDL64.out"> HDL2-June2708.Debug.lkf
	-@echo "ClearRegs.obj">> HDL2-June2708.Debug.lkf
	-@echo "CRC-iniFordt.obj">> HDL2-June2708.Debug.lkf
	-@echo "EtherRecieve.obj">> HDL2-June2708.Debug.lkf
	-@echo "EtherRESET.obj">> HDL2-June2708.Debug.lkf
	-@echo "Ethersetuphdl.obj">> HDL2-June2708.Debug.lkf
	-@echo "LDLASER8xR2.obj">> HDL2-June2708.Debug.lkf
	-@echo "MainDualA-DR3.obj">> HDL2-June2708.Debug.lkf
	-@echo "MotorR3.obj">> HDL2-June2708.Debug.lkf
	-@echo "Read120Mwtimestamp.obj">> HDL2-June2708.Debug.lkf
	-@echo "SerialIn.obj">> HDL2-June2708.Debug.lkf
	-@echo "SETADCr2.obj">> HDL2-June2708.Debug.lkf
	-@echo "StoreEprom11-02.obj">> HDL2-June2708.Debug.lkf
	-@echo "SyncDMA.obj">> HDL2-June2708.Debug.lkf
	-@echo "Time01.obj">> HDL2-June2708.Debug.lkf
	-@echo "EpromBoot11-02.cmd">> HDL2-June2708.Debug.lkf
	"$(DIR_1)/cl6x" -@"HDL2-June2708.Debug.lkf"
	-@rm -f HDL2-June2708.Debug.lkf

0 George Mock over 7 years ago in reply to Krishna Vallabhaneni

TI__Guru**** 253190 points

Unfortunately, I cannot build the file MainDualA-DR3.sa without changes. It includes a few other files, which I do not have. Nonetheless, I think I know what is wrong.

First, you need to know the difference between ordinary typical assembly code and linear assembly code. Just within this post, I will call ordinary typical assembly code scheduled assembly. Scheduled assembly code is written to run on the CPU exactly as presented. All the pipeline effects of the instructions are accounted for. Linear assembly, by contrast, is not scheduled. A tool in the C6000 compiler toolchain, called the assembly optimizer, schedules the instructions to account for pipeline effects. In addition, linear assembly supports using symbolic names for registers, and the assembly optimizer replaces those symbolic names with real machine registers. For more information, please search the C6000 compiler manual for the chapter titled Using the Assembly Optimizer.

The most important point is that the compiler shell, cl6x, presumes the file extension .sa means the file contains linear assembly, and not scheduled assembly. Thus the assembly optimizer is invoked with the file MainDualA-DR3.sa as input. However, inspection of that file shows it does not contain linear assembly, but scheduled assembly. It contains none of the directives or structure present in linear assembly code.

I recommend you change the file extension from ".sa" to ".asm". Then the assembly optimizer is not used, and your problems will probably go away.

Thanks and regards,

-George

0 Krishna Vallabhaneni over 7 years ago in reply to George Mock

Intellectual 390 points

The file extension was changed to .asm from .sa. It did not make any difference, the problem did not go away. This compiled last week. What could have changed?

0 George Mock over 7 years ago in reply to Krishna Vallabhaneni

TI__Guru**** 253190 points

Krishna Vallabhaneni said:
The file extension was changed to .asm from .sa. It did not make any difference, the problem did not go away.

I cannot reproduce that result. Please send in a test case which fails with similar diagnostics. The source file has to have the file extension ".asm". That is different from the last test case, where the source file has the externsion ".sa". Please make sure it does not include any other files. As before, show the exact build options used.

Krishna Vallabhaneni said:
This compiled last week. What could have changed?

It is impossible to say. Something must have changed.

I can reproduce the error where a source file with the extension ".sa", and contains .loop directives, fails to build. For that problem, I filed the entry CODEGEN-5436 in the SDOWP system, in order to have this problem investigated. You are welcome to follow it with SDOWP link below in my signature.

Thanks and regards,

-George

0 George Mock over 7 years ago in reply to George Mock

TI__Guru**** 253190 points

Please submit the requested test case.

Thanks and regards,

-George

0 George Mock over 7 years ago in reply to George Mock

TI__Guru**** 253190 points

Since it has been a while, I presume you have resolved your problem. I'd appreciate hearing how you resolved it.

Thanks and regards,

-George

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