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CCS/TMS320C5517: xdc/std.h building problem in CCS 6.2

Part Number: TMS320C5517

Tool/software: Code Composer Studio

Hi ,

I am using ccs 6.2 tools version and trying to build the BF_rt_bios  as per the instructions given in TI video.

I installed xdc tools , BIOS/DSP 5_42_02_10 and all other tools as per the TI demo.

Initially i come across xdc/std.h  inclusion error, so i searched TI forum and  added  xdc_target_types and xdc_target_name , also included xdc tools directory in options.

After doing that xdc/std.h error disappeared but encountered other error that :

Description Resource Path Location Type

#error <ti/targets/std.h> is not supported for this target .ccsproject /BF_rt_bios line 83, external location: C:\ti\c55_lp\xdctools_3_25_03_72\packages\ti\targets\std.h C/C++ Problem

 

I added following in pre defines:

xdc_target_name__=C64P

xdc_target_types__=ti/targets/std.h

Here i am attaching screen shot of my error.

Regards,

Sivaram

 

  • I'm confused. Are you trying to build a C55 application or a C64P application? Your compiler options are a mixture of both.

    The error from std.h occurs because there is no device class defined (ie "--define=_TMS320C6X") in the compiler options.

    Alan
  • Hi,

    I have tried with C55_LARGE compiler option but did not worked so selected C64P, How ever i found the reason.

    Here this is the problem , I used xdctools_3_25_03_72 version as per C5517 documentation but this version has no support for c55 compiler, So i installed xdctools_3_24_07_73  which has support to C55 compiler , By using this i could fix the xdc/std.h issue  .

    But now i am facing memory overlap error for SRAM,DRAM,SARAM,NAND,NOR  all memory segments.

    If i am working on existing project that is share by TI for demo then it is weird to see all these error.

    Please find the attached.

    Regards,

    Sivaram

  • I'm not familiar with this example but it appears to me that your project has two linker command files that both define memory regions.

    I suggest removing the C5517.cmd file from the project so that only the BF_rt_bios_cfg.cmd file is used.

    Alan

  • Hi Alan,

    I removed 5517 cmd file but i am using 5517 EVM, after removing i see 5505 cmd file generated .

    Ok after removing 5517 cmd file memory overlap errors are fixed, now finally i end up with following :

    fatal error: file
    "C:/ti/c55_lp/volib_C55_CPU3_2_1_0_1/packages/ti/mas/vpe/lib/vpe_c.a55L<nr.o
    55L>" specifies "C55x CPU Rev 3.x", which is not compatible with "C55x CPU
    Rev 2.x" specified in a previous file or on the command line

    Please help me to resolve this, where to specify in options to use C55x CPU Rev 3.x" instead of 2.x

    Regards,

    Sivaram

  • Can you share the complete build console log?

    The error means that the vpe_c.a55L library you're linking with was compiled with incompatible device options.

    One of the libraries or object files linked with prior to the vpe_c.a55L library was built with Rev 2.x silicon_version options.

    Perhaps this wiki article on the topic will be helpful:

        http://processors.wiki.ti.com/index.php/C55x_Common_Errors_and_Fixes

    Alan

  • Hi Alan,

    Now i could build the projects after removing cmd file.

    I am trying to load but getting following error :

    C55xx: Trouble Writing Memory Block at 0x20c0 on Page 0 of Length 0x1fb4: This operation is not supported by this driver
    C55xx: File Loader: Verification failed: Target failed to write 0x0020C0@PROGRAM
    C55xx: GEL: File: C:\ti\c55_lp\c55_csl_3.07\demos\audio-preprocessing\c5517\Debug\BF_rt_bios.out: Load failed.

    Here i have doubt, I have chosen Silicon version as 5515 in compiler option my board is 5517 EVM , If i chose 5517 i am getting warning showing  unknown version followed by errors mentioned in earlier thread, so i removed 5517 cmd file and built the projects using 5515 option.

    So let me know how to fix this load error. Thanks for your support.

    Regards,

    Sivaram

  • I confirmed that the offending address range (0x20c0 to 0x4074) lies within the CC5517's DARAM regions. I don't know why CCS is having a problem with it. Have you checked CCS's Memory Map for the device? The GEL file associated with the target should inform CCS about the memory ranges and types.

    At this point, you may need help from a CCS expert.

    Alan