CCS/AM6548: DSS API to use System_View instead of APB_View

Hi Brad,

Brad Griffis said:

When I use CCS to connect to the DAP (CS_DAP_0), I see that it comes up by default in APB_View

Are you referring to the Memory Browser view? When I open it for the DAP, it seems to always default to the System View. I am using a different target though (Vayu)

Brad Griffis said:

.  I'm writing a script where I connect to CS_DAP_0 and want to read these same addresses, but I don't see how to programmatically select that same System_View from DSS.

I'm digging through the API doc and don't see a way to flip between the different modes. I'll keep digging and keep you posted

Thanks

ki

What is the APB view anyway?  I can't even find what the acronym stands for.  I can understand why there are two different views for the ARM cores, i.e. I assume there are different options that perhaps take into account cache and/or MMU.  For the DAP, however, I was just expecting a single view.

By the way, a different solution to the issue might be if there is a way to setup my ccxml file to default to the System_View for DAP or if there is some type of CCS preference somewhere to disable APB_View for DAP.  There are a lot of ways we could solve this potentially.  A DSS API was the first thing that came to mind, but I'm open to other ideas.  Ultimately my goal is to read out a list of register locations using the DAP.

I forgot to to mention that I also confirmed that APB_View seems to be the default for DAP on AM65xx.  For example, I performed the following quick test:

1. Connected to AM6548 DAP.  I saw APB_View was set.
2. Changed manually to System_View.
3. Disconnected from DAP.  As soon as I disconnect I see the window changes back to APB_View.
4. Reconnected to DAP.  It remains on APB_View.

Brad Griffis said:

What is the APB view anyway?  I can't even find what the acronym stands for.  I can understand why there are two different views for the ARM cores, i.e. I assume there are different options that perhaps take into account cache and/or MMU.  For the DAP, however, I was just expecting a single view.

I don't really know for sure either. I was digging around the ARM docs and came across:

http://infocenter.arm.com/help/topic/com.arm.doc.epm039795/coresight_technical_introduction_EPM_039795.pdf

"Both externally hosted debug agents and on-chip debug agents (for example a debug monitor) require access to debug components. Within CoreSight, these debug components are provided on a dedicated bus, the debug APB. This ensures a clear separation between system memory space and debug memory space. An exception is the Cortex-M processors where a shared AHB interconnect supports both system memory and debug access as an area-reduction trade-off."

This seems to explain things a bit

Brad Griffis said:

Ultimately my goal is to read out a list of register locations using the DAP

Did you try the DSS ReadRegister APIs?

Brad Griffis said:

Not exactly intuitive

Yup, it certainly is not. I'm thinking this should be documented somewhere... but where? Is accessing system memory from the DAP something that is common? I think a better change is to flip it so that System_View is page 0 (default) instead. Not only do i suspect that this is the more common use case, but it would align with other devices that have System_View as the default. 

Ki-Soo Lee said:

Is accessing system memory from the DAP something that is common

I like the DAP in general since you can look at memory unobtrusively (i.e. don't need to halt the ARM).  It is particularly handy in ARM-based devices so that you don't have to worry about the MMU.  So with respect to debugging issues on Sitara devices, I primarily use the DAP for low level debug in Linux based systems.  RTOS users would likely already be using JTAG to talk to the ARM, so likely less common there.

Ki-Soo Lee said:

I think a better change is to flip it so that System_View is page 0 (default) instead.

For any new devices, yes, it would make a lot of sense to have System_View as the default.  If you change the behavior on AM65xx you'll make things a little tougher for me in that I'll need to add some extra intelligence to the script to figure out whether to use page 0 (e.g. for newer CCS versions) or page 2 for older versions.  I've done that sort of thing before though, so it wouldn't be the end of the world.

Making that change would probably avoid a lot of questions from people trying to use the DAP and confused on why they can't see memory.  So leaving it alone or changing it is fine with me.  In terms of documentation, well, hopefully this thread is something people can find if they bump into the issue.  I suspect only a small number of people are using the DAP at all, and an even smaller fraction are writing scripts for the DAP.  So this probably isn't a burning issue to be addressed (though I appreciate you helping me get past it!).