Tool/software: Code Composer Studio
Hello,
I have the below defined arrays. I'm using a TM4C123 part. My CCS version is Version: 8.3.0.00009. My compiler version is "TI v18.1.1.LTS [TI v18.1.4LTS]. Output format is eabi (ELF), little endian.
volatile uint16_t buff1[256] volatile uint16_t buff1[256]
I store values in them via an ADC isr. This takes a sample and sticks it in buff1 and increments it. I do this every interrupt until buff1 is full then I start filling up buff2 and alternate back and forth. My main loop waits for a full buffer and kicks a dma channel off to write them out of a SPI port.
I have increased my optimizations to level 3 in project properties under CCS Build -> Arm Compiler ->Optimization. Optimization level is 0 - Register optimizations, Speed vs size trade offs is set to 3, floating point mode is set to strict.
Now when I look at larger data sets I see a lot of errors when using level 3 for speed vs size trade offs setting. When I implement if statements that read the buffers these errors seem to go away. I also see these errors go away when I back the "optimization for speed vs size" down to 1.
It looks like there is some affect on these arrays due to compiler optimization settings. Could this be possible and how would I get to the bottom of figuring out what is going on?
