Other Parts Discussed in Thread: CODECOMPOSER,
Tool/software: Code Composer Studio
Hii,
i am kalpesh, currently i am working on TMS320F28035 controller. so now i am using 16bit MEMwidth in codecomposer studio. Here i have custome CAN bootloader and i am flashing application hex file with our own flasher tool. so i have observed that when i flashed through JTAG then it's ok. but when i am flashing application hex file so in this hex file there is some address skipped and not filling value with 0xFFFF. Acutally in JTAG case, whole code is taken care by JATG , but when i am flashing through tool i want filling 0xFFFF number in skipped address
below is a intel hex file so first line offset 9FFA after 4 words means two offset 9FFE & 9FFF valued skipped direclty started with A000.
:08 9FFA 00 767E BE6E 9A01 0006 9E
:20 A000 00 761F 0278 1801 FFFE 1801 FF03 1801 FFFD 9A00 9B00 1E06 9A00 9B00 1E08 9A00 9B00 02
i want alignment and padding with value like this way is it possible ?
:0C 9FFA 00 767E BE6E 9A01 0006 FFFF FFFF 9E
i have .cmd file if it is necessary to changed in it.
Below application cmd file
MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
RAML0 : origin = 0x008000, length = 0x000800 /* on-chip RAM block L0 */
RAML1 : origin = 0x008800, length = 0x000400 /* on-chip RAM block L1 */
OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */
FLASHH : origin = 0x3E8002, length = 0x001FFE /* on-chip FLASH */
FLASHG : origin = 0x3EA000, length = 0x002000 /* on-chip FLASH */
FLASHF : origin = 0x3EC000, length = 0x002000 /* on-chip FLASH */
FLASHE : origin = 0x3EE000, length = 0x002000 /* on-chip FLASH */
//FLASHD : origin = 0x3F0000, length = 0x002000 /* on-chip FLASH */
//FLASHC : origin = 0x3F2000, length = 0x002000 /* on-chip FLASH */
//FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when
CSM is in use. */
BEGIN2 : origin = 0x3E8000, length = 0x000002
CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in
FLASHA */
IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */
ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */
BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML2 : origin = 0x008C00, length = 0x000400 /* on-chip RAM block L2 */
RAML3 : origin = 0x009000, length = 0x001000 /* on-chip RAM block L3 */
FLASHB : origin = 0x3F4000, length = 0x002000 /* on-chip FLASH */
}
/* Allocate sections to memory blocks.
Note:
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
execution when booting to flash
ramfuncs user defined section to store functions that will be copied from Flash into RAM
*/
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHH PAGE = 0
.pinit : > FLASHH, PAGE = 0
.text : >> FLASHH |FLASHG | FLASHF | FLASHE PAGE = 0
codestart : > BEGIN2 PAGE = 0
ramfuncs : LOAD = FLASHH,
RUN = RAML0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
RUN_START(_RamfuncsRunStart),
PAGE = 0
csmpasswds : > CSM_PWL_P0 PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0
/* Allocate uninitalized data sections: */
.stack : > RAMM0 PAGE = 1
.ebss : >> RAML3 | RAMM1 PAGE = 1
.esysmem : > RAML2 PAGE = 1
/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */
.econst : > FLASHH PAGE = 0
.switch : > FLASHH PAGE = 0
/* Allocate IQ math areas: */
IQmath : > FLASHH PAGE = 0 /* Math Code */
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{
IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
}
*/
/* Uncomment the section below if calling the IQNasin() or IQasin()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
{
IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)
}
*/
/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
plz help me for find out solution
